Datasheet
SBAS312B − JANUARY 2005 − REVISED AUGUST 2007
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3
ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range at −40°C to +85°C, AV
DD
= 5V, BV
DD
= 3V, CH x+ = 0.5V to 4.5V, CH x− = 2.5V,
REFIN = REFOUT = internal +2.5V, CLKIN = 20MHz, and 16-bit Sinc
3
filter with decimation by 256, unless otherwise noted.
ADS1205I
PARAMETER TEST CONDITIONS
MIN TYP
(1)
MAX
UNITS
Resolution 16 Bits
DC Accuracy
INL
Integral linearity error
(2)
−1.4 ±3 LSB
INL
Integral linearity error
(2)
−0.002 ±0.005 % FSR
Integral linearity match
6 LSB
Integral linearity match
0.009 % FSR
DNL Differential nonlinearity
(3)
±1 LSB
V
OS
Input offset error
(4)
−1.2 ±3 mV
Input offset error match 0.1 2 mV
TCV
OS
Input offset error drift 1.1 8 µV/°C
G
ERR
Gain error
(4)
Referenced to V
REF
−0.01 ±0.5 % FSR
Gain error match 0.09 0.5 % FSR
TCG
ERR
Gain error drift 1.3 ppm/°C
PSRR Power-supply rejection ratio 4.75V < AV
DD
< 5.25V 78 dB
Analog Input
FSR Full-scale differential range (CH x+) − (CH x−); CH x− = 2.5V ±2.5 V
Specified differential range (CH x+) − (CH x−); CH x− = 2.5V ±2 V
Maximum operating input range
(3)
0 AV
DD
V
Input capacitance Common-mode 3 pF
Input leakage current CLK turned off ±1 nA
Differential input resistance 100 kΩ
Differential input capacitance 2.5 pF
CMRR
Common-mode rejection ratio
At DC 108 dB
CMRR
Common-mode rejection ratio
V
IN
= ±1.25V
PP
at 40kHz 117 dB
BW Bandwidth FS sine wave, −3dB 50 MHz
Sampling Dynamics
Internal clock frequency CLKSEL = 1 8 9.8 12 MHz
CLKIN External clock frequency
(5)
CLKSEL = 0 1 20 24 MHz
AC Accuracy
THD Total harmonic distortion V
IN
= ±2V
PP
at 5kHz −96.6 −88 dB
SFDR Spurious-free dynamic range V
IN
= ±2V
PP
at 5kHz 92 98 dB
SNR Signal-to-noise ratio V
IN
= ±2V
PP
at 5kHz 86 88.9 dB
SINAD Signal-to-noise + distortion V
IN
= ±2V
PP
at 5kHz 85 88.2 dB
Channel-to-channel isolation
(3)
V
IN
= ±2V
PP
at 50kHz 100 dB
ENOB Effective number of bits 14 14.5 Bits
(1)
All typical values are at T
A
= +25°C.
(2)
Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve
for CH x+ = −2V to +2V at 2.5V, expressed either as the number of LSBs or as a percent of measured input range (4V).
(3)
Ensured by design.
(4)
Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5)
With reduced accuracy, the clock frequency can go from 1MHz to 33MHz.
(6)
Applicable for 5.0V nominal supply: BV
DD
(min) = 4.5V and BV
DD
(max) = 5.5V.
(7)
Applicable for 3.0V nominal supply: BV
DD
(min) = 2.7V and BV
DD
(max) = 3.6V.