Datasheet

ADS1202
5
SBAS275B
www.ti.com
t
D4
t
w4
t
C4
MCLK
MDAT
DIAGRAM 4: Mode 3 Operation.
SPEC DESCRIPTION MODE MIN MAX UNITS
t
C1
Clock Period 0 83 125 ns
t
W1
Clock HIGH Time 0 t
C1
/2 – 5t
C1
/2 + 5 ns
t
D1
Data delay after falling edge of clock 0 –22ns
t
C2
Clock Period 1 166 250 ns
t
W2
Clock HIGH Time 1 t
C2
/2 – 5t
C2
/2 + 5 ns
t
D2
Data delay after rising edge of clock 1 –22ns
t
D3
Data delay after falling edge of clock 1 –22ns
t
C3
Clock Period 2 83 125 ns
t
W3
Clock HIGH Time 2 t
C3
/2 – 5t
C3
/2 + 5 ns
t
C4
Clock Period 3 41 62 ns
t
W4
Clock HIGH Time 3 10 t
C4
– 10 ns
t
D4
Data delay after falling edge of clock 3 0 10 ns
t
R1
Rise Time of Clock 3 0 10 ns
t
F1
Fall Time of Clock 3 0 10 ns
NOTE: All input signals are specified with t
R
= t
F
= 5ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2. See timing diagrams 1 thru 4.
TIMING CHARACTERISTICS
over recommended operating free-air temperature range –40°C to +85°C, V
DD
= 5V, and MCLK = 10MHz, unless otherwise noted.
TIMING DIAGRAMS (Cont.)