Datasheet

ADS1194, ADS1196
ADS1198
www.ti.com SBAS471C –APRIL 2010– REVISED NOVEMBER 2011
Changes from Revision A (September 2010) to Revision B Page
• Updated Family and Ordering Information table ................................................................................................................... 2
• Added Digital Filter section to Electrical Characteristics table .............................................................................................. 3
• Updated test conditions of Internal Reference, Output voltage parameter in Electrical Characteristics table ..................... 4
• Updated format of Power Dissipation (Analog Supply = 3V) section in the Electrical Characteristics table ........................ 6
• Changed 3V Power Dissipation, Quiescent channel power test conditions in the Electrical Characteristics table .............. 6
• Updated format of Power Dissipation (Analog Supply = 5V) section in the Electrical Characteristics table ........................ 6
• Changed 5V Power Dissipation, Quiescent channel power test conditions in the Electrical Characteristics table .............. 6
• Changed values of -3dB Bandwidth column of Table 1 ....................................................................................................... 7
• Changed values of -3dB Bandwidth column of Table 2 ....................................................................................................... 7
• Changed description of VCAP3 in BGA Pin Assignments table ........................................................................................... 9
• Changed CLK row in BGA Pin Assignments table ............................................................................................................... 9
• Changed CLK row of PAG Pin Assignments table ............................................................................................................. 11
• Changed description of VCAP3 in PAG Pin Assignments table ......................................................................................... 11
• Updated and moved Figure 14 ........................................................................................................................................... 16
• Changed description of CHnSET setting in Device Noise Measurements section ............................................................ 18
• Changed description of (MVDDP – MVDDN) for channels 1, 2, 5, 6, 7, and 8 in Supply Measurements (MVDDP,
MVDDN) section ................................................................................................................................................................. 19
• Updated Equation 4 ............................................................................................................................................................ 22
• Updated Equation 5 ............................................................................................................................................................ 22
• Updated footnote 1 of Figure 26 ......................................................................................................................................... 24
• Added footnote 1 to Table 6 ............................................................................................................................................... 25
• Added status and GPIO register bit description to Data Retrieval section ......................................................................... 27
• Changed title of Figure 29 .................................................................................................................................................. 28
• Updated Figure 31 .............................................................................................................................................................. 29
• Updated Figure 32 .............................................................................................................................................................. 30
• Updated Figure 35 .............................................................................................................................................................. 32
• Changed STANDBY: Enter STANDBY Mode description .................................................................................................. 35
• Changed ID register row of Table 10 .................................................................................................................................. 39
• Changed ID: ID Control Register section ........................................................................................................................... 40
• Changed bit descriptions of ID: ID Control Register section .............................................................................................. 40
• Changed description for bits 4 to 1 of PACE: PACE Detect Register section .................................................................... 47
• Updated Figure 42 .............................................................................................................................................................. 51
• Updated Figure 43 .............................................................................................................................................................. 52
• Updated Figure 46 .............................................................................................................................................................. 55
• Updated Figure 49 .............................................................................................................................................................. 57
• Updated Figure 50 and added footnote 2 ........................................................................................................................... 59
• Updated Figure 51 .............................................................................................................................................................. 60
• Updated Figure 52 .............................................................................................................................................................. 60
• Updated Figure 53 .............................................................................................................................................................. 62
• Added Analog Input Structure section ................................................................................................................................ 64
Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 69
Product Folder Link(s): ADS1194 ADS1196 ADS1198