Datasheet

ADS1194, ADS1196
ADS1198
www.ti.com SBAS471C –APRIL 2010– REVISED NOVEMBER 2011
CLOCK
The ADS1194/6/8 provide two different methods for device clocking: internal and external. Internal clocking is
ideally suited for low-power, battery-powered systems. The internal oscillator is trimmed for accuracy at room
temperature. Over the specified temperature range the accuracy varies; see the Electrical Characteristics. Clock
selection is controlled by the CLKSEL pin and the CLK_EN register bit.
The CLKSEL pin selects either the internal or external clock. The CLK_EN bit in the CONFIG1 register enables
and disables the oscillator clock to be output in the CLK pin. A truth table for these two pins is shown in Table 5.
The CLK_EN bit is useful when multiple devices are used in a daisy-chain configuration. It is recommended that
during power-down the external clock be shut down to save power.
Table 5. CLKSEL Pin and CLK_EN Bit
CONFIG1.CLK_EN
CLKSEL PIN BIT CLOCK SOURCE CLK PIN STATUS
0 X External clock Input: external clock
1 0 Internal clock oscillator 3-state
1 1 Internal clock oscillator Output: internal clock oscillator
DATA FORMAT
The ADS1194/6/8 outputs 16 bits of data per channel in binary twos complement format, MSB first. The LSB has
a weight of V
REF
/(2
15
– 1). A positive full-scale input produces an output code of 7FFFh and the negative
full-scale input produces an output code of 8000h. The output clips at these codes for signals exceeding
full-scale. Table 6 summarizes the ideal output codes for different input signals.
Table 6. Ideal Input Code versus Input Signal
(1)
INPUT SIGNAL, V
IN
(AINP – AINN) IDEAL OUTPUT CODE
(2)
≥ V
REF
7FFFh
+V
REF
/(2
15
– 1) 0001h
0 0000h
–V
REF
/(2
15
– 1) FFFFh
≤ –V
REF
(2
15
/2
15
– 1) 8000h
(1) Assumes gain = 1.
(2) Excludes effects of noise, linearity, offset, and gain error.
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