Datasheet

PIN TEST USING TEST[1:0] INPUTS
VCOM OUTPUT
NOTE:BufferisrequiredifVCOMisusedforanypurpose.
OPA350
0.1 Fm
VCOM VDD/2)(A»
ADS1174/ADS1178
ADS1174
ADS1178
SBAS373B – OCTOBER 2007 – REVISED SEPTEMBER 2008 ........................................................................................................................................ www.ti.com
The analog input, power supply, and ground pins
remain connected as normal. The test mode is
Test mode allows continuity testing of the digital I/O
engaged by the setting the pins TEST[1:0] = 11. For
pins. In this mode, the normal functions of the digital
normal converter operation, set TEST[1:0] = 00.
pins are disabled and routed to each other as pairs
through internal logic, as shown in Table 13 . Note
that some of the digital input pins become outputs;
this configuration should be taken into account when
The VCOM pin is an analog output of approximately
using test mode.
AVDD/2. This voltage may be used to set the
common-mode voltage of the input buffers. The drive
Table 13. Test Mode Pin Map (TEST[1:0] = 11)
capability of this output is limited; most cases require
an external buffer to minimize loading. A 0.1 µ F
TEST MODE PIN MAP
(1)
capacitor to AGND is recommended to reduce noise
INPUT PINS OUTPUT PINS
pick-up.
PWDN1 DOUT1
PWDN2 DOUT2
PWDN3 DOUT3
PWDN4 DOUT4
PWDN5
(2)
DOUT5
(2)
PWDN6
(2)
DOUT6
(2)
PWDN7
(2)
DOUT7
(2)
PWDN8
(2)
DOUT8
(2)
MODE DIN
Figure 25. VCOM Output
FORMAT0 CLKDIV
FORMAT1 DRDY/FSYNC
FORMAT2 SCLK
(1) The CLK input does not have a test output; SYNC = 1 and is
an output.
(2) ADS1178 only.
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