Datasheet

ADS1158
SBAS429D –JUNE 2008– REVISED MARCH 2011 www.ti.com
Serial Clock (SCLK) Operation Reading DATA
The serial clock (SCLK) is an input that is used to DRDY goes low to indicate that new conversion data
clock data into (DIN) and out of (DOUT) the are ready. The data may be read via a direct data
ADS1158. This input is a Schmitt-trigger input that read (Channel Data Read Direct) or in a register
has a high degree of noise immunity. However, it is format (Channel Data Read Register). A direct data
recommended to keep SCLK as clean as possible to read requires the data to be read before the next
prevent glitches from inadvertently shifting the data. occurrence of DRDY or the data are corrupted. This
Data are shifted into DIN on the rising edge of SCLK type of data read requires synchronization with DRDY
and data are shifted out of DOUT on the falling edge to avoid this conflict. When reading data in the
of SCLK. If SCLK is held inactive for 4096 or 256 f
CLK
register format, the data may be read at any time
cycles (SPIRST bit of register CONFIG0), read or without concern to DRDY. The NEW bit of the
write operations in progress terminate and the SPI STATUS byte indicates that the data register has
interface resets. This timeout feature can be used to been refreshed with new converter data since the last
recover lost communication when a serial interface read operation. The data are shifted out MSB first
transmission is interrupted or inadvertently glitched. after the STATUS byte.
It should be noted that on system power-up, if the
Data Input (DIN) and Data Output (DOUT)
ADS1158 interface signals are floating or undefined,
Operation
the interface could wake in an unknown state. This
The data input pin (DIN) is used to input data to the
condition is remedied by resetting the interface in
ADS1158. The data output pin (DOUT) is used to
three ways: toggle the RESET pin low then high;
output data from the ADS1158. Data on DIN is shifted
toggle the CS pin high then low; or hold SCLK
into the converter on the rising edge of SCLK while
inactive for 2
18
+ 4096 f
CLK
cycles.
data are shifted out on DOUT on the falling edge of
SCLK. DOUT 3-states when CS is high to allow
Channel Data Read Direct
multiple devices to share the line.
Channel data can be accessed from the ADS1158 in
two ways: Direct data read or data read with register
SPI Bus Sharing
format. With Direct read, the DIN input pin is held
The ADS1158 can be connected to a shared SPI bus.
inactive (high or low) for at least the first three SCLK
DOUT 3-states when CS is deselected (high). When
transitions. When the first three bits are 000 or 111,
the ADS1158 is connected to a shared bus, data can
the device detects a direct data read and channel
be read only by the Channel Data Read command
data are output. After the device detects this read
format.
format, commands are ignored until either CS is
toggled, an SPI timeout occurs or the device is reset.
COMMUNICATION PROTOCOL The Channel Data Read command does not have
this requirement.
Communicating with the ADS1158 involves shifting
data into the device (via the DIN pin) or shifting data
out of the device (via the DOUT pin) under control of
the SCLK input.
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