Datasheet

t
SAMPLE
ON
OFF
S
1
S
2
OFF
ON
S
1
S
1
AVSS+1.3V
R =R ||2R
AIN effB effA
AVSS+1.3V
R =190kW
effA
R =78kW
effB
(f =16MHz)
CLK
R =190kW
effA
ADCINN
ADCINP
C =0.65pF
A1
C =1.6pF
B
C =0.65pF
A2
ADCINN
S
2
AVSS+1.3V
S
2
AVSS+1.3V
ADCINP
Equivalent
Circuit
R =t /C
eff SAMPLE X
NOTE:ESDinputdiodesnotshown.
ADS1158
SBAS429D –JUNE 2008– REVISED MARCH 2011 www.ti.com
ADC INPUTS inputs. The average value of this current can be used
to calculate an effective impedance (R
eff
) where R
eff
=
The ADS1158 ADC inputs (ADCINP, ADCINN)
V
IN
/I
AVERAGE
. These impedances scale inversely with
measure the input signal using internal capacitors
f
CLK
. For example, if f
CLK
is reduced by a factor of
that are continuously charged and discharged. The
two, the impedances will double.
left side of Figure 24 shows a simplified schematic of
the ADC input circuitry; the right side of Figure 24 As with the multiplexer and reference inputs, ESD
shows the input circuitry with the capacitors and diodes protect the ADC inputs. To keep these diodes
switches replaced by an equivalent circuit. Figure 23 from turning on, make sure the voltages on the input
shows the ON/OFF timings of the switches shown in pins do not go below AVSS by more than 100mV,
Figure 24. S
1
switches close during the input and likewise do not exceed AVDD by more than
sampling phase. With S
1
closed, C
A1
charges to 100mV.
ADCINP, C
A2
charges to ADCINN, and C
B
charges to
(ADCINP – ADCINN). For the discharge phase, S
1
opens first and then S
2
closes. C
A1
and C
A2
discharge
to approximately AVSS + 1.3V and C
B
discharges to
0V. This two-phase sample/discharge cycle repeats
with a period of t
SAMPLE
= 2/f
CLK
.
The charging of the input capacitors draws a transient
current from the source driving the ADS1158 ADC
Figure 23. S
1
and S
2
Switch Timing for Figure 24
Figure 24. Simplified ADC Input Structure
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