Datasheet
REFN1REFP1
ADC
ADS1148 Only
REFN0REFP0
V
REFN
V
REFP
VREFCOMVREFOUT
ReferenceMultiplexer
Internal
Voltage
Reference
ADS1146
ADS1147
ADS1148
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SBAS453F –JULY 2009–REVISED APRIL 2012
ESD diodes protect the ADC inputs. To prevent these V
REF
= V
REFP
– V
REFN
diodes from turning on, make sure the voltages on
In the case of the ADS1146, these pins are dedicated
the input pins do not go below AVSS by more than
inputs. For the ADS1147 and ADS1148, there is a
100mV, and do not exceed AVDD by more than
multiplexer that selects the reference inputs, as
100mV, as shown in Equation 2. Note that the same
shown in Figure 20. The reference input uses a buffer
caution is true if the inputs are configured to be
to increase the input impedance.
GPIOs.
As with the analog inputs, REFP0 and REFN0 can be
AVSS – 100mV < (AINX) < AVDD + 100mV (2)
configured as digital I/Os on the ADS1147 and
ADS1148.
Settling Time for Channel Multiplexing
The ADS1146/7/8 is a true single-cycle settling ΔΣ
converter. The first data available after the start of a
conversion are fully settled and valid for use. The
time required to settle is roughly equal to the inverse
of the data rate. The exact time depends on the
specific data rate and the operation that resulted in
the start of a conversion; see Table 12 for specific
values.
ANALOG INPUT IMPEDANCE
The ADS1146/7/8 inputs are buffered through a high-
impedance PGA before they reach the ΔΣ modulator.
For the majority of applications, the input current
leakage is minimal and can be neglected. However,
because the PGA is chopper-stabilized for noise and
Figure 20. Reference Input Multiplexer
offset performance, the input impedance is best
described as a small absolute input current. The
The reference input circuit has ESD diodes to protect
absolute current leakage for selected channels is
the inputs. To prevent the diodes from turning on,
approximately proportional to the selected modulator
make sure the voltage on the reference input pin is
clock. Table 3 shows the typical values for these
not less than AVSS – 100mV, and does not exceed
currents with a differential voltage coefficient and the
AVDD + 100mV, as shown in Equation 3:
corresponding input impedances over data rate.
AVSS – 100mV < (V
REFP
or V
REFN
) < AVDD + 100mV (3)
VOLTAGE REFERENCE INPUT
The voltage reference for the ADS1146/7/8 is the
differential voltage between REFP and REFN:
Table 3. Typical Values for Analog Input Current Over Data Rate
EFFECTIVE INPUT
CONDITION ABSOLUTE INPUT CURRENT
IMPEDANCE
DR = 5SPS, 10SPS, 20SPS ± (0.5nA + 0.1nA/V) 5000MΩ
DR = 40SPS, 80SPS, 160SPS ± (2nA + 0.5nA/V) 1200MΩ
DR = 320SPS, 640SPS, 1kSPS ± (4nA + 1nA/V) 600MΩ
DR = 2kSPS ± (8nA + 2nA/V) 300MΩ
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