Datasheet
t
SAMPLE
ON
OFF
S
1
S
2
OFF
ON
Equivalent
Circuit
f =250kHz
CLK
Z
CM
Z
DIFF
Z
CM
AIN
N
AIN
P
0.7V
0.7V
S
1
S
1
C
A1
C
B
C
A2
S
2
S
2
0.7V
0.7V
AIN
N
AIN
P
ADS1118
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SBAS457D –OCTOBER 2010–REVISED OCTOBER 2013
ANALOG INPUTS
The ADS1118 uses a switched-capacitor input stage where capacitors are continuously charged and then
discharged to measure the voltage between AIN
P
and AIN
N
. The capacitors used are small, and to external
circuitry, the average loading appears resistive. This structure is shown in Figure 40. The resistance is set by the
capacitor values and the rate at which they are switched. Figure 41 shows the on/off setting of the switches
illustrated in Figure 40. During the sampling phase, switches S
1
are closed. This event charges C
A1
to AIN
P
, C
A2
to AIN
N
, and C
B
to (AIN
P
– AIN
N
). During the discharge phase, S
1
is first opened and then S
2
is closed. Both C
A1
and C
A2
then discharge to approximately 0.7 V and C
B
discharges to 0 V. This charging draws a very small
transient current from the source driving the ADS1118 analog inputs. The average value of this current can be
used to calculate the effective impedance (R
eff
), where R
eff
= V
IN
/ I
AVERAGE
.
Figure 40. Simplified Analog Input Circuit
Figure 41. S
1
and S
2
Switch Timing for Figure 40
The common-mode input impedance is measured by applying a common-mode signal to the shorted AIN
P
and
AIN
N
inputs and measuring the average current consumed by each pin. The common-mode input impedance
changes depending on the PGA gain setting, but is approximately 6MΩ for the default PGA gain setting. In
Figure 40, the common-mode input impedance is Z
CM
.
The differential input impedance is measured by applying a differential signal to AIN
P
and AIN
N
inputs where one
input is held at 0.7 V. The current that flows through the pin connected to 0.7 V is the differential current and
scales with the PGA gain setting. In Figure 40, the differential input impedance is Z
DIFF
. Table 1 describes the
typical differential input impedance.
Table 1. Differential Input Impedance
FS (V) DIFFERENTIAL INPUT IMPEDANCE
±6.144
(1)(1)
22 MΩ
±4.096
(1)(1)
15 MΩ
±2.048 4.9 MΩ
±1.024 2.4 MΩ
±0.512 710 kΩ
±0.256 710 kΩ
(1) This parameter expresses the full-scale range of the ADC scaling. In
no event should more than VDD + 0.3V be applied to this device.
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