Datasheet

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SBAS282D − JUNE 2003 − REVISED MARCH 2004
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6
TYPICAL CHARACTERISTICS (continued)
At T
A
= 25°C and VDD = 5V, unless otherwise noted.
THEORY OF OPERATION
The ADS1112 is a 16-bit, self-calibrating, delta-sigma A/D
converter with an input multiplexer. Extremely easy to de-
sign with and configure, the ADS1112 allows precise mea-
surements to be obtained with a minimum of effort.
The ADS1112 consists of a delta-sigma A/D converter
core with adjustable gain, a 2.048V reference, a clock os-
cillator, and an I
2
C interface. Each of these blocks are de-
scribed in detail in the sections that follow.
ANALOG-TO-DIGITAL CONVERTER
The ADS1112 A/D converter core consists of a differential
switched-capacitor delta-sigma modulator followed by a
digital filter. The modulator measures the voltage differ-
ence between the positive and negative analog inputs se-
lected by the input multiplexer and compares it to a refer-
ence voltage, which, in the ADS1112, is 2.048V. The digital
filter receives a high-speed bitstream from the modulator
and outputs a code, which is a number proportional to the
input voltage.
MULTIPLEXER
The ADS1112 has an input multiplexer that provides for
two differential or three single-ended input channels. Two
bits in the configuration register control the multiplexer
setting.
VOLTAGE REFERENCE
The ADS1112 contains an onboard 2.048V voltage refer-
ence. This reference is always used as the ADC voltage
reference; an external reference cannot be connected.
The ADS1112 voltage reference is internal only, and can-
not be measured directly or used by external circuitry.
The onboard reference specifications are part of the over-
all gain and drift specifications of the ADS1112. The con-
verter drift and gain error specifications reflect the perfor-
mance of the onboard reference as well as the
performance of the A/D converter core. There are no sepa-
rate specifications for the onboard reference itself.
OUTPUT CODE CALCULATION
The output code is a scaled value that is proportional, ex-
cept for clipping, to the voltage difference between the two
analog inputs. The output code is confined to a finite range
of numbers; this range depends on the number of bits
needed to represent the code. The number of bits needed
to represent the output code for the ADS1112 depends on
the data rate, as shown in Table 1.
DATA RATE
NUMBER OF
BITS
MINIMUM
CODE
MAXIMUM
CODE
15SPS 16 −32,768 32,767
30SPS 15 −16,384 16,383
60SPS 14 −8192 8191
240SPS 12 −2048 2047
Table 1. Minimum and Maximum Codes
For a minimum output code of Min Code, gain setting of the
PGA, and positive and negative input voltages of V
IN+
and
V
IN−
, the output code is given by the expression:
Output Code + −1 Min Code PGA
(V
IN)
) * (V
IN*
)
2.048V
In the previous expression, it is important to note that the
negated minimum output code is used. The ADS1112
outputs codes in binary two’s complement format, so the