Datasheet

ADS1110
SBAS276A − MARCH 2003 − REVISED NOVEMBER 2003
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10
I
2
C DATA RATES
The I
2
C bus operates in one of three speed modes:
Standard, which allows a clock frequency of up to 100kHz;
Fast, which allows a clock frequency of up to 400kHz; and
High-speed mode (also called Hs mode), which allows a
clock frequency of up to 3.4MHz. The ADS1110 is fully
compatible with all three modes.
No special action needs to be taken to use the ADS1110
in Standard or Fast modes, but High-speed mode must be
activated. To activate High-speed mode, send a special
address byte of 00001xxx following the START condition,
where xxx are bits unique to the Hs-capable master. This
byte is called the Hs master code. (Note that this is different
from normal address bytes: the low bit does not indicate
read/write status.) The ADS1110 will not acknowledge this
byte; the I
2
C specification prohibits acknowledgment of
the Hs master code. On receiving a master code, the
ADS1110 will switch on its Hs mode filters, and
communicate at up to 3.4MHz. The ADS1110 will switch
out of Hs mode with the next STOP condition.
For more information on High-speed mode, consult the I
2
C
specification.
REGISTERS
The ADS1110 has two registers that are accessible via its
I
2
C port. The output register contains the result of the last
conversion; the configuration register allows the user to
change the ADS1110 operating mode and query the status
of the device.
OUTPUT REGISTER
The 16-bit output register contains the result of the last
conversion in binary two’s complement format. Following
reset or power−up, the output register is cleared to zero;
it remains zero until the first conversion is completed.
The output register’s format is shown in Table 4.
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NAME D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Table 4. Output Register