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Frame1:I CSlaveAddressByte
2
Frame2:OutputRegisterUpperByte
StartBy
Master
ACKBy
ADS1000
ACKBy
Master
From
ADS1000
From
ADS1000
1
9
1
9
···
···
···
···
SDA
SCL
SDA
(Continued)
SCL
(Continued)
1
0 0
1
A2 A1
A0
R/W
D15
D14
D13
D12 D11
D10 D9 D8
Frame3:OutputRegisterLowerByte Frame4:ConfigurationRegister
(Optional)
ACKBy
Master
StopBy
Master
ACKBy
Master
From
ADS1000
1
9 1
D7 D6 D5 D4 D3 D2 D1 D0
ST/
BSY
0 0 SC 0 0
PGA1
PGA0
9
Frame1:I CSlaveAddressByte
2
Frame2:ConfigurationRegister
1
StartBy
Master
ACKBy
ADS1000
ACKBy
ADS1000
1 9 1 9
SDA
SCL
0 0 1
A2
A1 A0 R/W
ST/
BSY
0 0 SC
PGA1 PGA0
StopBy
Master
0 0
ADS1000
SBAS357A – SEPTEMBER 2006 – REVISED OCTOBER 2007
Figure 7. Timing Diagram for Reading from the ADS1000
Figure 8. Timing Diagram for Writing to the ADS1000
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