Datasheet
ADCS7476, ADCS7477, ADCS7478
SNAS192F –APRIL 2003–REVISED MARCH 2013
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ADCS7476/ADCS7477/ADCS7478 Specifications
(1)
ADCS7478 Converter Electrical Characteristics (continued)
The following specifications apply for V
DD
= +2.7V to 5.25V, f
SCLK
= 20 MHz, f
SAMPLE
= 1 MSPS unless otherwise noted.
Boldface limits apply for T
A
= −40°C to +85°C: all other limits T
A
= 25°C, unless otherwise noted.
Symbol Parameter Conditions Typical Limits Units
I
SOURCE
= 200 µA,
V
OH
Output High Voltage V
DD
−0.2 V (min)
V
DD
= +2.7V to +5.25V
V
OL
Output Low Voltage I
SINK
= 200 µA 0.4 V (max)
I
OL
TRI-STATE Leakage Current ±10 µA (max)
C
OUT
TRI-STATE Output Capacitance 2 4 pF (max)
Output Coding Straight (Natural) Binary
AC ELECTRICAL CHARACTERISTICS
f
SCLK
Clock Frequency 20 MHz (max)
40 % (min)
DC SCLK Duty Cycle
60 % (max)
t
TH
Track/Hold Acquisition Time 400 ns (max)
f
RATE
Throughput Rate See Applications Information 1 MSPS (min)
t
AD
Aperture Delay 3 ns
t
AJ
Aperture Jitter 30 ps
Figure 2. Timing Test Circuit
Timing Test Circuit ADCS7476/ADCS7477/ADCS7478 Timing Specifications
The following specifications apply for V
DD
= +2.7V to 5.25V, f
SCLK
= 20 MHz, Boldface limits apply for T
A
= −40°C to +85°C:
all other limits T
A
= 25°C, unless otherwise noted.
(1)
Symbol Parameter Conditions Typical Limits Units
t
CONVERT
16 x t
SCLK
t
QUIET
(2)
50 ns (min)
t
1
Minimum CS Pulse Width 10 ns (min)
t
2
CS to SCLK Setup Time 10 ns (min)
Delay from CS Until SDATA TRI-STATE
t
3
20 ns (max)
Disabled
(3)
V
DD
= +2.7 to +3.6 40 ns (max)
Data Access Time after SCLK Falling
t
4
Edge
(4)
V
DD
= +4.75 to +5.25 20 ns (max)
0.4 x
t
5
SCLK Low Pulse Width ns (min)
t
SCLK
0.4 x
t
6
SCLK High Pulse Width ns (min)
t
SCLK
V
DD
= +2.7 to +3.6 7 ns (min)
t
7
SCLK to Data Valid Hold Time
V
DD
= +4.75 to +5.25 5 ns (min)
(1) All input signals are specified as t
r
= t
f
= 5 ns (10% to 90% V
DD
) and timed from 1.6V.
(2) Minimum Quiet Time Required Between Bus Relinquish and Start of Next Conversion
(3) Measured with the load circuit shown above, and defined as the time taken by the output to cross 1.0V.
(4) Measured with the load circuit shown above, and defined as the time taken by the output to cross 1.0V or 2.0V.
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