Datasheet

ADCS7476, ADCS7477, ADCS7478
www.ti.com SNAS192F –APRIL 2003–REVISED MARCH 2013
Operating Ratings
Operating Temperature Range T
MIN
= −40°C ≤ T
A
≤ T
MAX
= +125°C
V
DD
Supply Voltage +2.7V to +5.25V
Digital Input Pins Voltage Range
(1)
+2.7V to +5.25V
(1) Independent of supply voltage.
Package Thermal Resistance
Package θ
JA
6-Lead SOT-23 265°C / W
6-Lead WSON 78°C / W
ADCS7476/ADCS7477/ADCS7478 Specifications
(1)
ADCS7476 Converter Electrical Characteristics
The following specifications apply for V
DD
= +2.7V to 5.25V, f
SCLK
= 20 MHz, f
SAMPLE
= 1 MSPS unless otherwise noted.
Boldface limits apply for T
A
= −40°C to +85°C: all other limits T
A
= 25°C, unless otherwise noted.
Symbol Parameter Conditions Typical Limits Units
STATIC CONVERTER CHARACTERISTICS
V
DD
= 2.7V to 3.6V,
Resolution with No Missing Codes 12 Bits
−40°C ≤ T
A
≤ 125°C
V
DD
= 2.7V to 3.6V,
±0.4 ±1 LSB (max)
−40°C ≤ T
A
≤ 85°C
INL Integral Non-Linearity
V
DD
= 2.7V to 3.6V, +1 LSB (max)
T
A
= 125°C -1.1 LSB (min)
V
DD
= 2.7V to 3.6V, +0.5 +1 LSB (max)
−40°C ≤ T
A
≤ 85°C -0.3 -0.9 LSB (min)
DNL Differential Non-Linearity
V
DD
= 2.7V to 3.6V,
±1 LSB (max)
T
A
= 125°C
V
DD
= 2.7V to 3.6V,
V
OFF
Offset Error ±0.1 ±1.2 LSB (max)
−40°C ≤ T
A
≤ 125°C
V
DD
= 2.7V to 3.6V,
GE Gain Error ±0.2 ±1.2 LSB (max)
−40°C ≤ T
A
≤ 125°C
DYNAMIC CONVERTER CHARACTERISTICS
SINAD Signal-to-Noise Plus Distortion Ratio f
IN
= 100 kHz, −40°C ≤ T
A
≤ 125°C 72 70 dB (min)
f
IN
= 100 kHz, −40°C ≤ T
A
≤ 85°C 72.5 70.8 dB (min)
SNR Signal-to-Noise Ratio
f
IN
= 100 kHz, T
A
= 125°C 70.6 dB (min)
THD Total Harmonic Distortion f
IN
= 100 kHz -80 dB
SFDR Spurious-Free Dynamic Range f
IN
= 100 kHz 82 dB
Intermodulation Distortion, Second Order
f
a
= 103.5 kHz, f
b
= 113.5 kHz -78 dB
Terms
IMD
Intermodulation Distortion, Third Order
f
a
= 103.5 kHz, f
b
= 113.5 kHz -78 dB
Terms
+5V Supply 11 MHz
FPBW -3 dB Full Power Bandwidth
+3V Supply 8 MHz
POWER SUPPLY CHARACTERISTICS
2.7 V (min)
V
DD
Supply Voltage −40°C ≤ T
A
≤ 125°C
5.25 V (max)
(1) Data sheet min/max specification limits are ensured by design, test, or statistical analysis.
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