Datasheet

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4.2 System Description

4.2.1 The ADC12D1X00RF

ADC12D1X00RF forms the heart of this reference board. This low-power, high-performance

CMOS analog-to-digital converter digitizes signals at 12-bit resolution at guaranteed minimum

sampling rates of 1.6/1.8 Gs/s in dual channel configuration and 3.2/3.6 Gs/s in single channel

configuration. The ADC12D1X00RF is targeted at achieving very good accuracy and dynamic

performance while consuming the lowest power available in the industry when both channels

are powered-up. The product is packaged in a thermally enhanced BGA package that does not

require a heat sink over the rated ambient temperature range of -40 degrees C to +70 degrees

C. Refer to the latest version of the ADC12D1X00RF datasheet for more detailed information.

This reference board gives complete control over the ADC12D1X00RF and gives the user direct

performance results of the chip without the need for an elaborate setup. Each of the device's

control pins may be set high or low. Control is provided in two different manners - direct pin control

with jumpers or through the serial interface (the device's extended control mode) using the WV 5

LOW. This is the recommended method and gives the user the most flexibility and ease of use.

Analog Front-End: The analog signal connection to the ADC is kept simple on this board in order

to achieve the highest possible bandwidth. The board is designed to be coupled to front-end

circuitry in a DC or AC coupled manner. AC-coupling requires the use of dc-blocks on the SMA

connectors. By default, the board is shipped by National with dc-blocks. In addition, the board is

also jumper-configured for DC-coupled operation (pin 9 on J15 is removed for DC operation).

Multi-channel ADC synchronization: A DCLK_RST signal input is provided to synchronize the

ADCs on multiple boards or systems. In addition, the ADC12D1X00RF supports a new method of

ADC synchronization, called AutoSync. Please refer to the ADC12D1X00RF datasheet for more

details.

4.2.2 LMX2531 Clock Synthesis chip

The LMX2531xxxx family provides a single-chip, very low-jitter clock solution at frequencies up

to 2.0 GHz. In this application, the LMX2531LQ1570E / LMX2531LQ1778E is used - which can

be programmed to operate over a range of 1530-1636MHz / 1726-1840MHz. On the

ADC12D1X00RFRB board, the device is configured for a frequency in this range through the

serial interface which may be controlled through the WaveVision 5 register control panel. The

particular frequency chosen is one that generates the least phase noise. It is not necessarily a

round number but depends on the loop feedback of the PLL’s in the clock synthesis chip.

The clock source for the ADC can be selected between the on-board LMX2531 or an external

clock source connected through the J11 SMA connector. The selection is performed through the

WV 5 register panel. It is recommended that the external clock source should be connected and

enabled before it is selected. For optimum performance, the external clock signal generator

and the LMX2531 should not be enabled at the same time. This is because the RF relay

used to select between them does not provide adequate isolation to keep one from affecting the

other. Having both clocks on simultaneously will result in excessive spurious signals. The

default setting for this board is the on-board LMX2531 clock source.