Datasheet

ADC78H90

www.ti.com

SNAS227D –NOVEMBER 2003–REVISED MARCH 2013

ANALOG INPUTS

An equivalent circuit for one of the ADC78H90's input channels is shown in Figure 25. Diodes D1 and D2 provide

ESD protection for the analog inputs. At no time should an analog input go beyond (AV

+ 300 mV) or (GND -

300 mV), as these ESD diodes will begin conducting, which could result in erratic operation.

The capacitor C1 in Figure 25 has a typical value of 3 pF, and is mainly the package pin capacitance. Resistor

R1 is the on resistance of the multiplexer and track / hold switch, and is typically 500 ohms. Capacitor C2 is the

ADC78H90 sampling capacitor, and is typically 30 pF. The ADC78H90 will deliver best performance when driven

by a low-impedance source to eliminate distortion caused by the charging of the sampling capacitance. This is

especially important when using the ADC78H90 to sample AC signals. Also important when sampling dynamic

signals is a band-pass or low-pass filter to reduce harmonics and noise, improving dynamic performance.

Figure 25. Equivalent Input Circuit

DIGITAL INPUTS AND OUTPUTS

The ADC78H90's digital inputs (SCLK, CS, and DIN) are limited by and cannot exceed the analog supply voltage

. The digital input pins are not prone to latch-up; SCLK, CS, and DIN may be asserted before DV

without

any risk.

POWER SUPPLY CONSIDERATIONS

The ADC78H90 has two supplies, although they could both have the same potential. There are two major power

supply concerns with this product. They are relative power supply levels, including power on sequencing, and the

effect of digital supply noise on the analog supply.

Power Management

The ADC78H90 is a dual-supply device. These two supplies share ESD resources, and thus care must be

exercised to ensure that the power supplies are applied in the correct sequence. To avoid turning on the ESD

diodes, the digital supply (DV

) cannot exceed the analog supply (AV

) by more than 300 mV. The

ADC78H90's analog power supply must, therefore, be applied before (or concurrently with) the digital power

supply.

The ADC78H90 is fully powered-up whenever CS is low, and fully powered-down whenever CS is high, with one

exception: the ADC78H90 automatically enters power-down mode between the 16th falling edge of a conversion

and the 1st falling edge of the subsequent conversion (see Figure 3).

The ADC78H90 can perform multiple conversions back to back; each conversion requires 16 SCLK cycles. The

ADC78H90 will perform conversions continuously as long as CS is held low.

The user may trade off throughput for power consumption by simply performing fewer conversions per unit time.

Figure 20 in Typical Performance Characteristics shows the typical power consumption of the ADC78H90 versus

throughput. To calculate the power consumption, simply multiply the fraction of time spent in the normal mode by

the normal mode power consumption (8.3 mW with AV

= DV

= +3.6V, for example), and add the fraction of

time spent in shutdown mode multiplied by the shutdown mode power dissipation (0.3 mW with AV

= DV

+3.6V).

Product Folder Links: ADC78H90