Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) Supply TSSOP 16

AIN1

AIN8

MUX

T/H

ADC78H90

SCLK

AGND

DGND

DIN

DOUT

CONTROL

LOGIC

12-BIT

SUCCESSIVE

APPROXIMATION

ADC

AGND

8 9

CS SCLK

DOUT

AGND DIN

AIN1 DV

AIN2 DGND

AIN3 AIN8

AIN4 AIN7

AIN5 AIN6

ADC78H90

www.ti.com

SNAS227D –NOVEMBER 2003–REVISED MARCH 2013

ADC78H90 8-Channel, 500 kSPS, 12-Bit A/D Converter

Check for Samples: ADC78H90

The ADC78H90 is packaged in a 16-lead TSSOP

FEATURES

package. Operation over the industrial temperature

• Eight input channels

range of −40°C to +85°C is ensured.

• Variable power management

Connection Diagram

• Independent analog and digital supplies

• SPI™/QSPI™/MICROWIRE™/DSP compatible

• Packaged in 16-lead TSSOP

APPLICATIONS

• Automotive Navigation

• Portable Systems

• Medical Instruments

• Mobile Communications

• Instrumentation and Control Systems

KEY SPECIFICATIONS

Figure 1. 16-Lead TSSOP

• Conversion Rate: 500kSPS

See PW Package

• DNL: ± 1LSB (max)

• INL: ± 1LSB (max)

Block Diagram

• Power Consumption

– 3V Supply: 1.5 mW (typ)

– 5V Supply: 8.3 mW (typ)

DESCRIPTION

The ADC78H90 is a low-power, eight-channel CMOS

12-bit analog-to-digital converter with a conversion

throughput of 500 kSPS. The converter is based on a

successive-approximation register architecture with

an internal track-and-hold circuit. It can be configured

to accept up to eight input signals at inputs AIN1

through AIN8.

The output serial data is straight binary, and is

compatible with several standards, such as SPI™,

QSPI™, MICROWIRE™, and many common DSP

PIN DESCRIPTIONS AND EQUIVALENT CIRCUITS

serial interfaces.

Pin Equivalent Description

Symbol

The ADC78H90 may be operated with independent

No. Circuit

analog and digital supplies. The analog supply (AV

)

ANALOG I/O

can range from +2.7V to +5.25V, and the digital

4 - AIN1 to Analog inputs. These signals

supply (DV

) can range from +2.7V to AV

. Normal

11 AIN8 can range from 0V to AV

power consumption using a +3V or +5V supply is 1.5

DIGITAL I/O

mW and 8.3 mW, respectively. The power-down

feature reduces the power consumption to just 0.3

µW using a +3V supply, or 0.5 µW using a +5V

supply.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

PAGE 1
ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 ADC78H90 8-Channel, 500 kSPS, 12-Bit A/D Converter Check for Samples: ADC78H90 FEATURES 1 • • • • • 2 Eight input channels Variable power management Independent analog and digital supplies SPI™/QSPI™/MICROWIRE™/DSP compatible Packaged in 16-lead TSSOP The ADC78H90 is packaged in a 16-lead TSSOP package. Operation over the industrial temperature range of −40°C to +85°C is ensured.
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ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com PIN DESCRIPTIONS AND EQUIVALENT CIRCUITS (continued) Pin No. 16 15 14 1 Symbol Equivalent Circuit Description SCLK Digital clock input. The range of frequencies for this input is 50 kHz to 8 MHz, with ensured performance at 8 MHz. This clock directly controls the conversion and readout processes. DOUT Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin. DIN Digital data input.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 Operating Ratings (1) (2) −40°C ≤ TA ≤ +85°C Operating Temperature Range AVDD Supply Voltage +2.7V to +5.25V DVDD Supply Voltage +2.7V to AVDD Digital Input Pins Voltage Range -0.3V to AVDD Clock Frequency 50 kHz to 8 MHz Analog Input Voltage (1) (2) 0V to AVDD Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
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ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com ADC78H90 Converter Electrical Characteristics (1) The following specifications apply for AVDD = DVDD = +2.7V to 5.25V, AGND = DGND = 0V, fSCLK = 8 MHz, fSAMPLE = 500 KSPS, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 ADC78H90 Converter Electrical Characteristics (1) (continued) The following specifications apply for AVDD = DVDD = +2.7V to 5.25V, AGND = DGND = 0V, fSCLK = 8 MHz, fSAMPLE = 500 KSPS, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C.
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ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com Timing Diagrams Figure 2. Timing Test Circuit Figure 3. ADC78H90 Operational Timing Diagram CS tCONVERT tACQ t6 SCLK 1 2 3 4 Z3 Z2 Z1 7 8 16 t8 t3 Z0 DB11 DB10 DB9 DB8 DB1 DB0 t5 t4 DIN 6 t7 t2 DOUT 5 DONT DONTC ADD2 ADD1 ADD0 DONTC DONTC DONTC Figure 4.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 Figure 5. SCLK and CS Timing Parameters Specification Definitions ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold capacitor to charge up to the input voltage. APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the input signal is acquired or held for conversion.
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ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com including harmonics but excluding d.c. SPURIOUS FREE DYNAMIC RANGE (SFDR) is the difference, expressed in dB, between the rms values of the input signal and the peak spurious signal where a spurious signal is any signal present in the output spectrum that is not present at the input, excluding d.c.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 Typical Performance Characteristics TA = +25°C, fSAMPLE = 500 kSPS, fSCLK = 8 MHz, fIN = 40.2 kHz unless otherwise stated. DNL DNL Figure 6. Figure 7. INL INL Figure 8. Figure 9. DNL vs. Supply INL vs. Supply Figure 10. Figure 11.
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ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 500 kSPS, fSCLK = 8 MHz, fIN = 40.2 kHz unless otherwise stated. 10 SNR vs. Supply THD vs. Supply Figure 12. Figure 13. ENOB vs. Supply SNR vs. Input Frequency Figure 14. Figure 15. THD vs. Input Frequency ENOB vs. Input Frequency Figure 16. Figure 17.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 500 kSPS, fSCLK = 8 MHz, fIN = 40.2 kHz unless otherwise stated. Spectral Response Spectral Response Figure 18. Figure 19. Power Consumption vs. Throughput Figure 20.
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ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com APPLICATIONS INFORMATION ADC78H90 OPERATION The ADC78H90 is a successive-approximation analog-to-digital converter designed around a chargeredistribution digital-to-analog converter. Simplified schematics of the ADC78H90 in both track and hold operation are shown in Figure 21 and Figure 22, respectively.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 USING THE ADC78H90 Figure 3 and Figure 4 for the ADC78H90 are shown in Timing Diagrams. CS, chip select, initiates conversions and frames the serial data transfers. SCLK (serial clock) controls both the conversion process and the timing of serial data. DOUT is the serial data output pin, where a conversion result is sent as a serial data stream, MSB first.
PAGE 14
ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com ADC78H90 TRANSFER FUNCTION The output format of the ADC89H90 is straight binary. Code transitions occur midway between successive integer LSB values. The LSB width for the ADC78H90 is AVDD / 4096. The ideal transfer characteristic is shown in Figure 23. The transition from an output code of 0000 0000 0000 to a code of 0000 0000 0001 is at 1/2 LSB, or a voltage of AVDD / 8192. Other code transitions occur at steps of one LSB. Figure 23.
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ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 ANALOG INPUTS An equivalent circuit for one of the ADC78H90's input channels is shown in Figure 25. Diodes D1 and D2 provide ESD protection for the analog inputs. At no time should an analog input go beyond (AVDD + 300 mV) or (GND 300 mV), as these ESD diodes will begin conducting, which could result in erratic operation. The capacitor C1 in Figure 25 has a typical value of 3 pF, and is mainly the package pin capacitance.
PAGE 16
ADC78H90 SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 www.ti.com Power Supply Noise Considerations The charging of any output load capacitance requires current from the digital supply, DVDD. The current pulses required from the supply to charge the output capacitance will cause voltage variations on the digital supply. If these variations are large enough, they could cause degrade SNR and SINAD performance of the ADC.
PAGE 17
ADC78H90 www.ti.com SNAS227D – NOVEMBER 2003 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PAGE 20
PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing ADC78H90CIMTX/NOPB TSSOP PW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 8.3 1.6 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADC78H90CIMTX/NOPB TSSOP PW 16 2500 367.0 367.0 35.
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