Datasheet

ADC161S626
SNAS468C SEPTEMBER 2008REVISED MARCH 2013
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Figure 42. Analog Input CMRR vs. Frequency
Noise
The noise floor of the ADC161S626 is very low as shown in Figure 43 and Figure 44. These figures were created
by driving the ADC input with a low-noise voltage source set near 0V. For Figure 43, the input was adjusted in
order to obtain the code 0x0000h. For Figure 44, the input was increased by 1/2 LSB in order to obtain the
transition point between code 0x0000h and 0x0001h. In both instances, 2
16
(65,534) samples were collected and
plotted in a histogram format.
Ideally the noise histogram at code center would show a single output code while the noise histogram at code
transition would show two output codes. Any codes outside of the ideal output are a result of the internal noise of
the ADC161S626 and the input source. Since the ADC161S626 has very low internal noise, only two codes
outside of the center code are exhibited in the histogram of Figure 43. Similar results are shown in Figure 44.
Figure 43. Noise Histogram at Code Center
Figure 44. Noise Histogram at Code Transition
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