Datasheet

12-bit
Delta-
Sigma
ADC and
MUX
Interrupt
Masking
and
Interrupt
Control
Interface and Control
IN0
IN1
IN2
IN3
IN4
IN5
Upper Limit
Lower Limit
Upper Limit
Lower Limit
Upper Limit
Lower Limit
Upper Limit
Lower Limit
Upper Limit
Lower Limit
Upper Limit
Lower Limit
IN0
IN1
IN2
IN3
IN4
IN5
IN6
16
15
14
13
12
11
10
Interrupt
Status
Registers
Serial Bus Interface
SDA
SCL
A0
Watchdog
3
2
7
IN6
IN7
Upper Limit
Lower Limit
Upper Limit
Lower Limit
IN7
9
V
+
GND
VREF
1
4
5
6
A1
8
INT
Internal
VREF =
2.56V
Tempe-
rature
Temperature
T
hot
T
hot_hyst
ADC128D818
www.ti.com SNAS483E –FEBRUARY 2010–REVISED MARCH 2013
PIN DESCRIPTIONS (continued)
Pin Pin ESD
Type Description
Number Name(s) Structure
Interrupt Request. Active Low, NMOS, open-drain.
6 INT Digital Output
Requires external pull-up resistor to function properly.
Tri-Level Serial Address pins that allow 9 devices on a
7 - 8 A0 - A1 Tri-Level Inputs
single I
2
C bus.
The full scale range will be controlled by the internal or
9 - 16 IN7 - IN0 Analog Inputs external VREF. These inputs can be assigned as single-
ended and/or pseudo-differential inputs.
Block Diagram
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