Datasheet

D7 D6 D5 D4 D3 D2 D1 D0
1 9 1 9
Ack by
ADC128D818
Start by
Master
R/W
Ack by
ADC128D818
Frame 1
Serial Bus Address
Byte from Master
Frame 2
Register Address
Byte from Master
D7 D6 D5 D4 D3 D2 D1 D0
1 9
1 9
Ack by
ADC128D818
No Ack by
Master
Stop
by
Master
1 9
D15 D14 D13 D12 D11 D10 D9 D8
Ack by
Master
Frame 3
Serial Bus Address
Byte from Master
Frame 4
Data Byte
from ADC128D818
Frame 5
Data Byte from
ADC128D818
R/W
A2
A0A1
A3A4A5A6
Repeat
Start by
Master
A2 A0A1A3A4A5A6
SCL
SDA
SCL
(continued)
SDA
(continued)
ADC128D818
SNAS483E –FEBRUARY 2010–REVISED MARCH 2013 www.ti.com
Figure 32. Serial Bus Interface Read Example 4 - Double Byte Read with Internal Address Set using a
Repeat Start.
USING THE ADC128D818
Table 6. ADC128D818 Internal Registers
Register
Read/ Default Value Register
Register Name Address Register Description
Write [7:0] Format
(hex)
Configuration Register R/W 00h 0000_1000 Provides control and configuration 8-bit
Provides status of each WATCHDOG limit or interrupt
Interrupt Status Register R 01h 0000_0000 8-bit
event
Interrupt Mask Register R/W 03h 0000_0000 Masks the interrupt status from propagating to INT 8-bit
Conversion Rate Register R/W 07h 0000_0000 Controls the conversion rate 8-bit
Disables conversion for each voltage or temperature
Channel Disable Register R/W 08h 0000_0000 8-bit
channel
One-Shot Register W 09h 0000_0000 Initiates a single conversion of all enabled channels 8-bit
Deep Shutdown Register R/W 0Ah 0000_0000 Enables deep shutdown mode 8-bit
Advanced Configuration Selects internal or external VREF and modes of
R/W 0Bh 0000_0000 8-bit
Register operation
Reflects the ADC128D818 'Busy' and 'Not Ready'
Busy Status Register R 0Ch 0000_0010 8-bit
statuses
Channel Readings
R 20h - 27h - - - Report channels (voltage or temperature) readings 16-bit
Registers
Set the limits for the voltage and temperature
Limit Registers R/W 2Ah - 39h - - - 8-bit
channels
Manufacturer ID Register R 3Eh 0000_0001 Reports the manufacturer's ID 8-bit
Revision ID Register R 3Fh 0000_1001 Reports the revision's ID 8-bit
Quick Start
1. Power on the device, then wait for at least 33ms.
2. Read the Busy Status Register (address 0Ch). If the 'Not Ready' bit = 1, then increase the wait time until 'Not
Ready' bit = 0 before proceeding to the next step.
3. Program the Advanced Configuration Register — Address 0Bh:
– a. Choose to use the internal or external VREF (bit 0).
– b. Choose the mode of operation (bits [2:1]).
4. Program the Conversion Rate Register (address 07h).
5. Choose to enable or disable the channels using the Channel Disable Register (address 08h).
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