Datasheet

D7 D6 D5 D4 D3 D2 D1 D0
1 9 1 9
Ack by
ADC128D818
Start by
Master
R/W
Ack by
ADC128D818
Frame 1
Serial Bus Address
Byte from Master
Frame 2
Register Address
Byte from Master
D7 D6 D5 D4 D3 D2 D1 D0
1 9
Ack by
ADC128D818
No Ack
by
Master
Stop
by
Master
1 9
Frame 3
Serial Bus Address
Byte from Master
Frame 4
Data Byte
from ADC128D818
R/W
A2
A0A1
A3A4A5A6
Repeat
Start by
Master
A2 A0A1A3A4A5A6
SCL
SDA
SCL
(continued)
SDA
(continued)
D7 D6 D5 D4 D3 D2 D1 D0
1 9
1 9
Ack by
ADC128D818
Start by
Master
No Ack
by
Master
SCL
SDA
Stop
by
Master
1 9
D15 D14 D13 D12 D11 D10 D9 D8
Ack
by
Master
Frame 1
Serial Bus Address
Byte from Master
Frame 2
Data Byte
from ADC128D818
Frame 3
Data Byte
from ADC128D818
R/W
A2
A0A1
A3A4A5A6
D7 D6 D5 D4 D3 D2 D1 D0
1 9
Start by
Master
No Ack
by
Master
SCL
SDA
Stop
by
Master
1 9
Frame 1
Serial Bus Address
Byte from Master
Frame 2
Data Byte
from ADC128D818
R/W
A2
A0A1
A3A4A5A6
Ack by
ADC128D818
D7 D6 D5 D4 D3 D2 D1 D0
1 9 1 9
Start by
Master
R/W
Frame 1
Serial Bus Address
Byte from Master
Frame 2
Register Address
Byte from Master
1 9
Frame 3
Data Byte
D3
D1D2
D4D5D6D7
A2 A0A1A3A4A5A6
SCL
SDA
SCL
(continued)
SDA
(continued)
Stop by
Master
D0
Ack by
ADC128D818
Ack by
ADC128D818
Ack by
ADC128D818
ADC128D818
www.ti.com SNAS483E –FEBRUARY 2010–REVISED MARCH 2013
Figure 28. Serial Bus Interface Write Example 2 - Internal Address Register Set with Data Byte Write.
Figure 29. Serial Bus Interface Read Example 1 - Single Byte Read with Preset Internal Address Register.
Figure 30. Serial Bus Interface Read Example 2 - Double Byte Read with Preset Internal Address
Register.
Figure 31. Serial Bus Interface Read Example 3 - Single Byte Read with Internal Address Set using a
Repeat Start.
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