Datasheet

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ADC128D818

www.ti.com

SNAS483E –FEBRUARY 2010–REVISED MARCH 2013

ADC128D818 12-Bit, 8-Channel, ADC System Monitor with Temperature Sensor,

Internal/External Reference, and I

C Interface

Check for Samples: ADC128D818

FEATURES

KEY SPECIFICATIONS

• 12-bit Resolution Delta-Sigma ADC

• ADC Resolution 12-bit

• Local Temperature Sensing • Supply Voltage Range +3 to +5.5 V

• Configurable Single-Ended and/or Pseudo-Diff. • Total Unadjusted Error –0.45%/+0.2%

Inputs

• Integral Non-Linearity ±1 LSb

• +2.56V Internal VREF or Variable External

• Differential Non-Linearity ±1 LSb

VREF

• Operating Current 0.56 mA

• WATCHDOG Window Comparators with Status

• Deep Shutdown Current 10 µA

and Mask Registers of All Measured Values

• Temperature Resolution °C/LSb

• Independent Registers for Storing Measured

• Temp. Accuracy (–40°C to 125°C) ±3°C

Values

• Temp. Accuracy (–25°C to 100°C) ±2°C

• INT Output Notifies Microprocessor of Error

Event

DESCRIPTION

• I

C Serial Bus Interface Compatibility

The ADC128D818 I

C system monitor is designed for

• 9 Selectable Addresses

maximum flexibility. The system monitor can be

configured for single-ended and/or pseudo-differential

• TIMEOUT Reset Function to Prevent I

C Bus

inputs. An on-board temperature sensor, combined

Lock-Up

with WATCHDOG window comparators, and an

• Individual Channel Shutdown to Limit Power

interrupt output pin, INT, allow easy monitoring and

Consumption

out-of-range alarms for every channel. A high

• Deep Shutdown Mode to Minimize Power

performance internal reference is also available to

Consumption

provide for a complete solution in the most difficult

operating conditions.

• TSSOP 16-Lead Package

The ADC128D818’s 12-bit delta-sigma ADC supports

APPLICATIONS

Standard Mode (Sm, 100 kbits/s) and Fast Mode

(Fm, 400kbits/s) I

C interfaces. The ADC128D818

• Communications Infrastructure

includes a sequencer to control channel conversions

• Thermal / Hardware Server Monitors

and stores all converted results in independent

• System Monitors

registers for easy microprocessor retrieval. Unused

channels can be shut down independently to

• Industrial and Medical Systems

conserve power.

• Electronic Test Equipment and

The ADC can use either an internal 2.56V reference

Instrumentation

or a variable external reference. An analog filter is

• Power Supply Monitoring / Supervision

included on the I

C digital control lines to provide

improved noise immunity. The device also includes a

TIMEOUT reset function on SDA and SCL to prevent

C bus lock-up.

The ADC128D818 operates from +3.0 to +5.5V

power supply voltage range, –40°C to 125°C

temperature range, and the device is available in a

16-pin TSSOP package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (40 pages)

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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 ADC128D818 12-Bit, 8-Channel, ADC System Monitor with Temperature Sensor, Internal/External Reference, and I2C Interface Check for Samples: ADC128D818 FEATURES KEY SPECIFICATIONS • • • • • • • • • • • • • 1 2 • • • • • • • • • • 12-bit Resolution Delta-Sigma ADC Local Temperature Sensing Configurable Single-Ended and/or Pseudo-Diff. Inputs +2.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Typical Application V+ Single-Ended Positive Voltage Internal VREF = +2.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 PIN DESCRIPTIONS (continued) Pin Number Pin Name(s) ESD Structure 6 INT Digital Output Interrupt Request. Active Low, NMOS, open-drain. Requires external pull-up resistor to function properly. 7-8 A0 - A1 Tri-Level Inputs Tri-Level Serial Address pins that allow 9 devices on a single I2C bus. 9 - 16 IN7 - IN0 Analog Inputs Type Description The full scale range will be controlled by the internal or external VREF.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Product Highlights The maximum number of channels that can be enabled for each input mode are shown in the table below. Unusued channels may be disabled through software. Table 1. Input Modes Modes of Operation Single-Ended Inputs Pseudo-Differential Inputs Internal Temperature Measurement Cycle Time with Maximum Number of Channels Enabled (ms - typ). 0 7 - 1 88 1 8 - - 96 2 - 4 1 52 3 4 2 1 76 Table 2.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Absolute Maximum Ratings (1) (2) (3) Supply Voltage (V+) 6.0V Voltage on SCL, SDA, A0, A1, INT –0.3V to 6.0V Voltage on IN0-IN7, VREF –0.3V to (V+ + 0.3)V and ≤ 6.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com DC Electrical Characteristics The following specifications apply for +3.0 VDC ≤ V+ ≤ +5.5 VDC , External VREF = +2.56V, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C (1). Min (2) Typical (3) Max (2) Units Supply Voltage 3.0 3.3 or 5.0 5.5 V External Reference Voltage 1.25 2.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 DC Electrical Characteristics (continued) The following specifications apply for +3.0 VDC ≤ V+ ≤ +5.5 VDC , External VREF = +2.56V, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C(1). Symbol Parameter Conditions Internal VREF, V+ = 3.0V to 3.6V. Internal VREF, V+ = 4.5V to 5.5V (7) GE Gain Error External VREF = 1.25V or 2.56V, V+ = 3.0V to 3.6V. External VREF = 2.56V or 5.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com AC Electrical Characteristics The following specifications apply for +3.0 VDC ≤ V+ ≤ +5.5 VDC , unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C. Symbol Parameter Conditions Min (1) Typical (2) Max (1) Units 100 µs SERIAL BUS TIMING CHARACTERISTICS t1 SCL (Clock) Period 2.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Typical Performance Characteristics The following typical performance plots apply for the internal VREF = 2.56V, V+ = 3.3V, Pseudo-Differential connection, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C. (1) TUE vs. Code (External VREF = 1.25V) -0.010 0.014 -0.074 0.004 -0.138 TUE (%) TUE (%) TUE vs. Code 0.023 -0.005 -0.015 -0.202 -0.266 -0.024 500.0 1.2k 1.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) The following typical performance plots apply for the internal VREF = 2.56V, V+ = 3.3V, Pseudo-Differential connection, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C.(1) 10 INL vs. Code (External VREF = 2.56V for 1 Unit) INL vs. Code (External VREF = 2.56V for 28 Units) Figure 8. Figure 9. INL vs.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Typical Performance Characteristics (continued) The following typical performance plots apply for the internal VREF = 2.56V, V+ = 3.3V, Pseudo-Differential connection, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C.(1) Offset Error vs. V+ Offset Error vs. Temperature 0.040 0.025 0.024 OFFSET ERROR (%) OFFSET ERROR (%) 0.023 0.030 0.020 0.010 0.022 0.021 0.020 0.019 0.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) The following typical performance plots apply for the internal VREF = 2.56V, V+ = 3.3V, Pseudo-Differential connection, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C.(1) I+ vs. V+ for Voltage Conversion I+ vs. V+ for Temperature Conversion 1.340 1.70 1.298 1.256 I+ (mA) I+ (mA) 1.60 1.214 1.50 1.40 1.172 1.30 1.130 2.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 FUNCTIONAL DESCRIPTION GENERAL DESCRIPTION The ADC128D818 provides 8 analog inputs, a temperature sensor, a delta-sigma ADC, an external or internal VREF option, and WATCHDOG registers on a single chip. An I2C Serial Bus interface is also provided. The ADC128D818 can perform voltage and temperature monitoring for a variety of systems. The ADC128D818 continuously converts the voltage input to 12-bit resolution with an internal VREF of 0.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com IN0 IN1 IN2 IN3 ADC128D818 + IN4 IN5 IN6 IN7 SRC - GND Figure 24. Single-Ended Configuration Pseudo-Differential Input Pseudo-differential mode is defined as the positive input voltage applied differentially to the ADC128D818, as shown in Figure 25. The input that is digitized is (ΔVIN = IN+ - IN-), where (IN+ - IN-) is (IN0-IN1), (IN3-IN2), (IN4-IN5), or (IN7-IN6). Be aware of this input configuration because the order is swapped.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 For the above equation, ΔVIN = INx - GND, where 0 ≤ x ≤ 7, for the single-ended configuration, and ΔVIN = (IN+ - IN-) for the pseudo-differential configuration. In theory, ΔVIN can be of any value between 0V and (VREF3LSb/2). Any ΔVIN value outside of this range will produce a digital output code of 0 or 4095. Figure 26 shows a theoretical plot of DOUT vs. ΔVIN and some sample DOUT calculation using the equation above.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com INTERFACE The Serial Bus control lines include the SDA (serial data), SCL (serial clock), and A0-A1 (Serial Bus Address) pins. The ADC128D818 can only operate as a slave. The SCL line only controls the serial interface, and all of other clock functions within ADC128D818 are done with a separate asynchronous internal clock.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 1 9 1 9 SCL SDA A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Ack by ADC128D818 Start by Master Frame 1 Serial Bus Address Byte from Master 1 SCL (continued) SDA (continued) Ack by ADC128D818 Frame 2 Register Address Byte from Master 9 D7 D6 D5 D4 D3 D2 D0 D1 Stop by Ack by ADC128D818 Master Frame 3 Data Byte Figure 28.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 6. Using the Interrupt Mask Register (address 03h), choose to mask or not to mask the interrupt status from propagating to the interrupt output pin, INT. 7. Program the Limit Registers (addresses 2Ah – 39h). 8. Set the ‘START’ bit of the Configuration Register (address 00h, bit 0) to 1. 9. Set the 'INT_Clear' bit (address 00h, bit 3) to 0. If needed, program the 'INT_Enable' bit (address 00h, bit 1) to 1 to enable the INT output.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com The second option is the Continuous Conversion Mode, where the device continuously converts the enabled channels, thus never entering shutdown mode. A voltage conversion takes 12.2 ms, and a temperature conversion takes 3.6 ms. For example, if operating in mode 2 and three voltage channels were enabled, then each round-robin monitor would take 40.2 ms (3 x 12.2ms + 3.6ms) to complete.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 (Non-Linear Scale for Clarity) Figure 33. 9-bit Temperature-to-Digital Transfer Function Temp Digital Output (DOUT) Binary [MSb...LSb] Decimal Hex +125°C 0 _1111_1010 250 0_FA +25°C 0_0011_0010 50 0_32 +0.5°C 0_0000_0001 1 0_01 +0°C 0_0000_0000 0 0_00 −0.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Digital Code Temp Limit Binary [MSb...LSb] Decimal Hex +0°C 0000_0000 0 00 −1.0°C 1111_1111 255 FF −25°C 1110_1111 231 E7 −40°C 1101_1000 216 D8 INTERRUPT STRUCTURE IN0 Watchdog IN1 Watchdog IN2 Watchdog IN3 Watchdog IN4 Watchdog IN5 Watchdog IN6 Watchdog Interrupt Status Registers Interrupt Mask Registers INT Enable INT_Clear (00h[1]) (00h[3]) INT IN7 Watchdog TEMP Watchdog Figure 34.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Figure 35. Temperature Response Structure (Assuming the interrupt output pin, INT, is reset before the next temperature reading) EXAMPLE APPLICATIONS General Voltage Monitoring V+ + 1 PF LM4140 1 PF 0.1 PF VREF + R1 SCL IN1 VIN2 IN2 R2 IN3 IN4+ VS2 Positive PseudoDifferential Input Voltage R SDA IN0 IN5- R3 ADC128D818 VS1 R 0.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Since SDA, SCL, and INT are open-drain pins, they should have external pull-up resistors to ensure that the bus is pulled high until a master device or slave device sinks enough current to pull the bus low. A typical pull-up resistor, R, ranges from 1.1 kOhm to 10 kOhm. Refer to NXP's "I2C-Bus Specification and User Manual" for more information on sizing R.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Temperature Sensors V+ 1 PF LM4140 1 PF + + 0.1 PF R VREF R SDA 0.1 PF IN0 (optional) R SCL VDD GS1 GS0 LM94022 IN2 IN3 OUT GND IN4 ADC128D818 IN1 INT GPO1 RA_top Microcontroller A0 RA_bottom GPO2 IN5 GPO3 RA_top IN6 A1 RA_bottom IN7 GND GPO4 Figure 38.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Bridge Sensors V+ 1 PF LM4140 1 PF + 0.1 PF R VREF + R2 SDA SCL IN2 1 + 2 1 1- IN3 IN4 Instrumentation Op-Amp R2 ADC128D818 IN1 Bridge Sensor R2 R 0.1 PF IN0 R2 R INT V+ Microcontroller RB_top A0 RB_bottom V+ IN5 IN6 RB_top A1 IN7 RB_bottom GND Figure 39. Bridge Sensor Application ADC128D818 is perfect for transducer applications such as pressure sensors.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Table 8.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.
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ADC128D818 www.ti.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Channel Disable Register — Address 08h Default Value [7:0] = 0000_0000 binary • This register must only be programmed when the device is in shutdown mode, that is, when the ‘START’ bit of the “Configuration Register’ (address 00h) = 0. • Whenever this register is programmed, all of the values in the Channel Reading Registers and Interrupt Status Registers will return to their default values.
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ADC128D818 www.ti.com Bit SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Bit Name Read/Write Bit(s) Description 0 IN0 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed. 1 IN1 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.
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ADC128D818 www.ti.
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ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 Address www.ti.
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ADC128D818 www.ti.com SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision D (March 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADC128D818CIMTX/NOP B Package Package Pins Type Drawing TSSOP PW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 8.3 1.6 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device ADC128D818CIMTX/NOP B Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TSSOP PW 16 2500 367.0 367.0 35.
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