Datasheet

ADC122S706
SNAS408A NOVEMBER 2007REVISED MARCH 2013
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POWER SUPPLY CONSIDERATIONS AND PCB LAYOUT
For best performance, care should be taken with the physical layout of the printed circuit board. This is especially
true with a low reference voltage or when the conversion rate is high. At high clock rates there is less time for
settling, so it is important that any noise settles out before the conversion begins.
Analog and Digital Power Supplies
Any ADC architecture is sensitive to spikes on the power supply, reference, and ground pins. These spikes may
originate from switching power supplies, digital logic, high power devices, and other sources. Power to the
ADC122S706 should be clean and well bypassed. A 0.1 µF ceramic bypass capacitor and a 1 µF to 10 µF
capacitor should be used to bypass the ADC122S706 supply, with the 0.1 µF capacitor placed as close to the
ADC122S706 package as possible.
Since the ADC122S706 has both an analog and a digital supply pin, the user has three options. The first option
is to tie the analog and digital supply pins together and power them with the same power supply. This is the most
cost effective way of powering the ADC122S706 but it is also the least ideal. As stated previously, noise from the
digital supply pin can couple into the analog supply pin and adversely affect performance. The other two options
involve the user powering the analog and digital supply pins with separate supply voltages. These supply
voltages can have the same amplitude or they can be different. The only design constraint is that the digital
supply voltage be less than the analog supply voltage. This is not usually a problem since many applications
prefer a digital interface of 3V while operating the analog section of the ADC122S706 at 5V. Operating the digital
supply pin at 3V as apposed to 5V offers two advantages. It lowers the power consumption of the ADC122S706
and it decreases the noise created by charging and discharging the capacitance of the digital interface pins.
Voltage Reference
The reference source must have a low output impedance and needs to be bypassed with a minimum capacitor
value of 0.1 µF. A larger capacitor value of 1 µF to 10 µF placed in parallel with the 0.1 µF is preferred. While the
ADC122S706 draws very little current from the reference on average, there are higher instantaneous current
spikes at the reference input.
The reference input of the ADC122S706, like all A/D converters, does not reject noise or voltage variations. Keep
this in mind if the reference voltage is derived from the power supply. Any noise and/or ripple from the supply
that is not rejected by the external reference circuitry will appear in the digital results. The use of an active
reference source is recommended. The LM4040 and LM4050 shunt reference families and the LM4132 and
LM4140 series reference families are excellent choices for a reference source.
PCB Layout
Capacitive coupling between the noisy digital circuitry and the sensitive analog circuitry can lead to poor
performance. The solution is to keep the analog circuitry separated from the digital circuitry and the clock lines
short as possible. Digital circuits create substantial supply and ground current transients. The logic noise
generated could have significant impact upon system noise performance. To avoid performance degradation of
the ADC122S706 due to supply noise, avoid using the same supply for the VA and VREF of the ADC122S706
that is used for digital circuitry on the board.
Generally, analog and digital lines should cross each other at 90° to avoid crosstalk. However, to maximize
accuracy in high resolution systems, avoid crossing analog and digital lines altogether. It is important to keep
clock lines as short as possible and isolated from ALL other lines, including other digital lines. In addition, the
clock line should also be treated as a transmission line and be properly terminated. The analog input should be
isolated from noisy signal traces to avoid coupling of spurious signals into the input. Any external component
(e.g., a filter capacitor) connected between the converter's input pins and ground or to the reference input pin
and ground should be connected to a very clean point in the ground plane.
A single, uniform ground plane and the use of split power planes are recommended. The power planes should be
located within the same board layer. All analog circuitry (input amplifiers, filters, reference components, etc.)
should be placed over the analog power plane. All digital circuitry and I/O lines should be placed over the digital
power plane. Furthermore, the GND pin on the ADC122S706 and all the components in the reference circuitry
and input signal chain that are connected to ground should be connected to the ground plane at a quiet point.
Avoid connecting these points too close to the ground point of a microprocessor, microcontroller, digital signal
processor, or other high power digital device.
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