Datasheet

V
IN
D1
R1
C2
30 pF
V
A
D2
C1
3 pF
Conversion Phase - Switch Open
Track Phase - Switch Closed
ADC122S021
www.ti.com SNAS280D –MARCH 2005–REVISED MARCH 2013
ANALOG INPUTS
An equivalent circuit for one of the ADC122S021's input channels is shown in Figure 49. Diodes D1 and D2
provide ESD protection for the analog inputs. At no time should any input go beyond (V
A
+ 300 mV) or (GND −
300 mV), as these ESD diodes will begin conducting, which could result in erratic operation. For this reason,
these ESD diodes should NOT be used to clamp the input signal.
The capacitor C1 in Figure 49 has a typical value of 3 pF, and is mainly the package pin capacitance. Resistor
R1 is the on resistance of the multiplexer and track / hold switch, and is typically 500 ohms. Capacitor C2 is the
ADC122S021 sampling capacitor and is typically 30 pF. The ADC122S021 will deliver best performance when
driven by a low-impedance source to eliminate distortion caused by the charging of the sampling capacitance.
This is especially important when using the ADC122S021 to sample AC signals. Also important when sampling
dynamic signals is a band-pass or low-pass filter to reduce harmonics and noise, improving dynamic
performance.
Figure 49. Equivalent Input Circuit
DIGITAL INPUTS AND OUTPUTS
The ADC122S021's digital output DOUT is limited by, and cannot exceed, the supply voltage, V
A
. The digital
input pins are not prone to latch-up and, and although not recommended, SCLK, CS and DIN may be asserted
before V
A
without any latch-up risk.
POWER SUPPLY CONSIDERATIONS
The ADC122S021 is fully powered-up whenever CS is low, and fully powered-down whenever CS is high, with
one exception: the ADC122S021 automatically enters power-down mode between the 16th falling edge of a
conversion and the 1st falling edge of the subsequent conversion (see Timing Diagrams).
The ADC122S021 can perform multiple conversions back to back; each conversion requires 16 SCLK cycles.
The ADC122S021 will perform conversions continuously as long as CS is held low.
The user may trade off throughput for power consumption by simply performing fewer conversions per unit time.
Figure 44 in TYPICAL PERFORMANCE CHARACTERISTICS shows the typical power consumption of the
ADC122S021 versus throughput. To calculate the power consumption, simply multiply the fraction of time spent
in the normal mode by the normal mode power consumption , and add the fraction of time spent in shutdown
mode multiplied by the shutdown mode power dissipation.
Power Management
When the ADC122S021 is operated continuously in normal mode, the maximum throughput is f
SCLK
/16.
Throughput may be traded for power consumption by running f
SCLK
at its maximum 3.2 MHz and performing
fewer conversions per unit time, putting the ADC122S021 into shutdown mode between conversions. Figure 44
is shown in TYPICAL PERFORMANCE CHARACTERISTICS. To calculate the power consumption for a given
throughput, multiply the fraction of time spent in the normal mode by the normal mode power consumption and
add the fraction of time spent in shutdown mode multiplied by the shutdown mode power consumption.
Generally, the user will put the part into normal mode and then put the part back into shutdown mode. Note that
Figure 44 is nearly linear. This is because the power consumption in the shutdown mode is so small that it can
be ignored for all practical purposes.
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