Datasheet

V
IN
D1
R1
C2
26 pF
V
A
D2
C1
4 pF
Conversion Phase - Switch Open
Track Phase - Switch Closed
MICROPROCESSOR
DSP
SCLK
CS
SDATA
GND
V
A
ADC121S051
LP2950
5V
1 PF
0.1 PF 0.1 PF1 PF
V
IN
ADC121S051
SNAS302H –JULY 2005–REVISED MARCH 2013 www.ti.com
TYPICAL APPLICATION CIRCUIT
A typical application of the ADC is shown in Figure 21. Power is provided in this example by the National
Semiconductor LP2950 low-dropout voltage regulator, available in a variety of fixed and adjustable output
voltages. The power supply pin is bypassed with a capacitor network located close to the ADC. Because the
reference for the ADC is the supply voltage, any noise on the supply will degrade device noise performance. To
keep noise off the supply, use a dedicated linear regulator for this device, or provide sufficient decoupling from
other circuitry to keep noise off the ADC supply pin. Because of the ADC 's low power requirements, it is also
possible to use a precision reference as a power supply to maximize performance. The three-wire interface is
shown connected to a microprocessor or DSP.
Figure 21. Typical Application Circuit
ANALOG INPUTS
An equivalent circuit for the ADC 's input is shown in Figure 22. Diodes D1 and D2 provide ESD protection for
the analog inputs. At no time should the analog input go beyond (V
A
+ 300 mV) or (GND − 300 mV), as these
ESD diodes will begin conducting, which could result in erratic operation. For this reason, the ESD diodes should
not be used to clamp the input signal.
The capacitor C1 in Figure 22 has a typical value of 4pF, and is mainly the package pin capacitance. Resistor R1
is the on resistance of the track / hold switch, and is typically 500Ω. Capacitor C2 is the ADC sampling capacitor
and is typically 26 pF. The ADC will deliver best performance when driven by a low-impedance source to
eliminate distortion caused by the charging of the sampling capacitance. This is especially important when using
the ADC to sample AC signals. Also important when sampling dynamic signals is an anti-aliasing filter.
Figure 22. Equivalent Input Circuit
DIGITAL INPUTS AND OUTPUTS
The ADC digital inputs (SCLK and CS) are not limited by the same maximum ratings as the analog inputs. The
digital input pins are instead limited to +5.25V with respect to GND, regardless of V
A
, the supply voltage. This
allows the ADC to be interfaced with a wide range of logic levels, independent of the supply voltage.
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