Datasheet
ADC12130, ADC12132, ADC12138
SNAS098G –MARCH 2000–REVISED MARCH 2013
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Part Number Output Voltage Tolerance Temperature Coefficient
LM4041CI-Adj ±0.5% ±100ppm/°C
LM4040AI-4.1 ±0.1% ±100ppm/°C
LM4120AI-4.1 ±0.2% ±50ppm/°C
LM4121AI-4.1 ±0.2% ±50ppm/°C
LM4050AI-4.1 ±0.1% ±50ppm/°C
LM4030AI-4.1 ±0.05% ±10ppm/°C
LM4040AI-4.1 ±0.1% ±3.0ppm/°C
Circuit of Figure 74 Adjustable ±2ppm/°C
The reference voltage inputs are not fully differential. The ADC12130/2/8 will not generate correct conversions or
comparisons if V
REF
+
is taken below V
REF
−
. Correct conversions result when V
REF
+
and V
REF
−
differ by 1V or more
and remain at all times between ground and V
A
+
. The V
REF
common mode range, (V
REF
+
+ V
REF
−
)/2, is restricted
to (0.1 × V
A
+
) to (0.6 × V
A
+
). Therefore, with V
A
+
= 5V, the center of the reference ladder should not go below
0.5V or above 3.0V. Figure 75 is a graphic representation of the voltage restrictions on V
REF
+
and V
REF
−
.
Figure 75. V
REF
Operating Range
4.0 ANALOG INPUT VOLTAGE RANGE
The ADC12130/2/8's fully differential ADC generate a two's complement output that is found by using the
equation shown below:
for (12-bit) resolution the Output Code =
(1)
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