Datasheet

ADC12048
SNAS105B –APRIL 2000–REVISED MARCH 2013 www.ti.com
When the power supply regulator is not local on the board, adequate bypassing (a high value electrolytic
capacitor) should be placed at the power entry point. The value of the capacitor depends on the total supply
current of the circuits on the PC board. All supply currents should be supplied by the capacitor instead of being
drawn from the external supply lines, while the external supply charges the capacitor at a steady rate.
The ADC has two V
D
+ and DGND pins. It is recommended that each of these V
D
+ pins be separately bypassed
to DGND with a 0.1 μF plus a 10 μF capacitor. The layout diagram of Figure 49 shows the recommended
placement for the supply bypass capacitors.
PC BOARD LAYOUT AND GROUNDING
CONSIDERATlONS
To get the best possible performance from the ADC12048, the printed circuit boards should have separate
analog and digital ground planes. The reason for using two ground planes is to prevent digital and analog ground
currents from sharing the same path until they reach a very low impedance power supply point. This will prevent
noisy digital switching currents from being injected into the analog ground.
Figure 49 illustrates a favorable layout for ground planes, power supply and reference input bypass capacitors. It
shows a layout using a 44-pin PLCC socket and through-hole assembly. A similar approach should be used for
the PQFP package.
The analog ground plane should encompass the area under the analog pins and any other analog components
such as the reference circuit, input amplifiers, signal conditioning circuits, and analog signal traces.
The digital ground plane should encompass the area under the digital circuits and the digital input/output pins of
the ADC12048. Having a continuous digital ground plane under the data and clock traces is very important. This
reduces the overshoot/undershoot and high frequency ringing on these lines that can be capacitively coupled to
analog circuitry sections through stray capacitances.
The AGND and DGND in the ADC12048 are not internally connected together. They should be connected
together on the PC board right at the chip. This will provide the shortest return path for the signals being
exchanged between the internal analog and digital sections of the ADC.
It is also a good design practice to have power plane layers in the PC board. This will improve the supply
bypassing (an effective distributed capacitance between power and ground plane layers) and voltage drops on
the supply lines. However, power planes are not as essential as ground planes are for satisfactory performance.
If power planes are used, they should be separated into two planes and the area and connections should follow
the same guidelines as mentioned for the ground planes. Each power plane should be laid out over its
associated ground planes, avoiding any overlap between power and ground planes of different types. When the
power planes are not used, it is recommended to use separate supply traces for the V
A
+ and V
D
+ pins from a
low impedance supply point (the regulator output or the power entry point to the PC board). This will help ensure
that the noisy digital supply does not corrupt the analog supply.
30 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: ADC12048