Datasheet

ADC12048
www.ti.com SNAS105B –APRIL 2000–REVISED MARCH 2013
acquisition time and operational command can be written into the configuration register or it can remain
unchanged. With the START command in the Configuration register, a read from the ADC12048 will place the
entire 13-bit conversion result stored in the data register on the data bus. The rising edge of the read pulse will
immediately force the RDY output high. The SYNC will then go high following the elapse of the programmed
acquisition time in the configuration register's bits b
5
and b
4
.
SYNC-IN/Synchronous
For the SYNC-IN case, it is assumed that a series of SYNC pulses at the desired sampling rate are applied at
the SYNC pin of the ADC12048.
8-bit mode: The first byte written to the ADC12048 should set the MUX channel and the HB bit. The second byte
should set the SYNC bit, write the START command and clear the BW bit.
A rising edge on the SYNC pin or the second rising edge of two consecutive reads from the ADC12048 will force
the RDY signal high. It is recommended that the action of reading from the ADC12048 (not the rising edge of the
SYNC signal) be used to raise the RDY signal. In the SYNC-IN mode, only the rising edge of the SYNC signal
will begin a conversion cycle. The rising edge of the SYNC also ends the acquisition period. The acquisition
period begins following a write cycle containing MUX channel information. The selected MUX channel is sampled
after the rising edge of the WR signal until the rising edge of the SYNC pulse, at which time the signal will be
held and conversion begins. The RDY signal will go low when the conversion is done. A new MUX channel
and/or operational command may be written into the Configuration register at this time, if needed. Two
consecutive read cycles are required to retrieve the entire 13-bit conversion result from the ADC12048's data
register. The first read will place the lower byte of the conversion result contained in the Data register on the data
bus. The second read will place the upper byte of the conversion result stored in the Data register on the data
bus. With the START command in the configuration register, the rising edge of the second read pulse will raise
the RDY signal high and begin a conversion cycle following a rising edge on the SYNC pin.
13-bit mode: The MUX channel should be selected, the SYNC bit should be set and the START command
issued with a single write to the ADC12048. A rising edge on the SYNC pin or on the RD pin will force the RDY
signal high. It is recommended that the action of reading from the ADC12048 (not the rising edge of the SYNC
signal) be used to raise the RDY signal. This will ensure that the conversion result is read during the acquisition
period of the next conversion cycle, eliminating a read from the ADC12048 while it is performing a conversion.
Noise generated by accessing the ADC12048 while it is converting may degrade the conversion result. In the
SYNC-IN mode, only the rising edge of the SYNC signal will begin a conversion cycle. The RDY signal will go
low when the conversion cycle is done. The acquisition time is controlled by the SYNC signal. The acquisition
period begins following a write cycle containing MUX channel information. The selected MUX channel is sampled
after the rising edge of the WR signal until the rising edge of the SYNC pulse, at which time the signal will be
held and conversion begins. A new MUX channel and/or operational command may be written into the
Configuration register at this time, if needed. With the START command in the Configuration register, a read from
the ADC12048 will place the entire conversion result stored in the Data register on the data bus and the rising
edge of the read pulse will force the RDY signal high. The selected MUX channel will be sampled until a rising
edge appears on the SYNC pin, at which the time sampled signal will be held and a conversion cycle started.
STANDBY COMMAND
8-bit mode: The first byte written to the ADC12048 should set the HB bit in the Configuration register (bit b
7
). The
second byte must issue the Standby command (bits b
11
, b
10
, b
9
= 0, 0, 0).
13-bit mode: The Standby command must be issued to the ADC12048 in single write (bits b
11
, b
10
, b
9
= 0, 0, 0).
RESET
The RESET command places the ADC12048 into a ready state and forces the RDY signal low. The RESET
command can be used to interrupt the ADC12048 while it is performing a conversion, full-calibration or auto-zero
cycle. It can also be used to get the ADC12048 out of the standby mode.
Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Links: ADC12048