Datasheet

ADC12030, ADC12032, ADC12034
ADC12038, ADC12H030, ADC12H032
ADC12H034, ADC12H038
SNAS080K –JULY 1999–REVISED MARCH 2013 www.ti.com
Package Thermal Resistance
Part Number Thermal Resistance (θ
JA
)
ADC12(H)030CIWM 70°C/W
ADC12032CIWM 64°C/W
ADC12034CIN 42°C/W
ADC12034CIWM 57°C/W
ADC12H034CIMSA 97°C/W
ADC12(H)038CIWM 50°C/W
NOTE: Some of these devices may be obsolete or on Lifetime Buy status. Check our web site for product
availability.
Converter Electrical Characteristics
The following specifications apply for V
+
= V
A
+ = V
D
+ = +5.0 V
DC
, V
REF
+ = +4.096 V
DC
, V
REF
− = 0 V
DC
, 12-bit + sign
conversion mode, f
CK
= f
SK
= 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f
CK
= f
SK
= 5 MHz for
the ADC12030, ADC12032, ADC12034 and ADC12038, R
S
= 25Ω, source impedance for V
REF
+ and V
REF
− ≤ 25Ω, fully-
differential input with fixed 2.048V common-mode voltage, and 10(t
CK
) acquisition time unless otherwise specified. Boldface
limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25°C.
(1)(2)(3)
Units
Parameter Test Conditions Typical
(4)
Limits
(5)
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes 12 + sign Bits (min)
ILE Integral Linearity Error After Auto Cal
(6)(7)
±1/2 ±1 LSB (max)
DNL Differential Non-Linearity After Auto Cal ±1 LSB (max)
Positive Full-Scale Error After Auto Cal
(6)(7)
±1/2 ±3.0 LSB (max)
Negative Full-Scale Error After Auto Cal
(6)(7)
±1/2 ±3.0 LSB (max)
After Auto Cal
(8)(7)
Offset Error ±1/2 ±2 LSB (max)
V
IN
(+) = V
IN
(−) = 2.048V
DC Common Mode Error After Auto Cal
(9)
±2 ±3.5 LSB (max)
(1) Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above V
A
+
or 5V below GND will not damage this device. However, errors in the conversion can occur (if these diodes are forward biased by more
than 50 mV) if the input voltage magnitude of selected or unselected analog input go above V
A
+ or below GND by more than 50 mV. As
an example, if V
A
+ is 4.5 V
DC
, full-scale input voltage must be ≤4.55 V
DC
to ensure accurate conversions.
(2) To ensure accuracy, it is required that the V
A
+ and V
D
+ be connected together to the same power supply with separate bypass
capacitors at each V
+
pin.
(3) With the test condition for V
REF
(V
REF
+ − V
REF
−) given as +4.096V, the 12-bit LSB is 1.0 mV and the 8-bit LSB is 16.0 mV.
(4) Typical figures are at T
J
= T
A
= 25°C and represent most likely parametric norm.
(5) Tested limits are specified to AOQL (Average Outgoing Quality Level).
(6) Positive integral linearity Error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes
through positive full-scale and zero. For Negative Integral Linearity Error, the straight line passes through negative full-scale and zero
(see Figure 6 and Figure 7).
(7) The ADC12030 family's self-calibration technique ensures linearity and offset errors as specified, but noise inherent in the self-
calibration process will result in a maximum repeatability uncertainty of 0.2 LSB.
(8) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
(9) The DC common-mode error is measured in the differential multiplexer mode with the assigned positive and negative input channels
shorted together.
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Product Folder Links: ADC12030 ADC12032 ADC12034 ADC12038 ADC12H030 ADC12H032 ADC12H034
ADC12H038