Datasheet

ADC1203Y
V
A
+
0.01 uF 0.1 uF 10 uF
0.01 uF 0.1 uF 10 uF
0.01 uF 0.1 uF 10 uF
LM4040-2.5
430:
+5.0V
V
D
+
V
REF
+
V
REF
-
+2.5V
DGNDAGND
ANALOG INPUT VOLTAGE
GROUND REFERENCE
CH0
CH1
CH2
to
CH8
COM
ANALOG INPUT
VOLTAGE RANGE
0V to 5V
12-BITS SIGNED
ASSIGNED
(+) INPUT
ASSIGNED
(-) INPUT
R2
600:
R1
(DEPENDS UPON
ACQUISITION TIME)
ADC1203Y
V
A
+
0.01 uF 0.1 uF 10 uF
0.01 uF 0.1 uF 10 uF
0.01 uF 0.1 uF 10 uF
LM4040-4.1
1k
+5.0V
V
D
+
V
REF
+
V
REF
-
+4.096V
DGNDAGND
ANALOG INPUT VOLTAGE
GROUND REFERENCE
CH0
CH2
CH4
or
CH6
COM
ASSIGNED
(+) INPUT
ASSIGNED
(-) INPUT
ANALOG INPUT
VOLTAGE RANGE
0V TO 4.096V
12-BITS
UNSIGNED
ADC12030, ADC12032, ADC12034
ADC12038, ADC12H030, ADC12H032
ADC12H034, ADC12H038
www.ti.com SNAS080K –JULY 1999–REVISED MARCH 2013
2.1 Biasing for Various Multiplexer Configurations
Figure 65 is an example of device connections for single-ended operation. The sign bit is always low. The digital
output range is 0 0000 0000 0000 to 0 1111 1111 1111. One LSB is equal to 1 mV (4.1V/4096 LSBs).
Figure 65. Single-Ended Biasing
For pseudo-differential signed operation, the circuit of Figure 66 shows a signal AC coupled to the ADC. This
gives a digital output range of −4096 to +4095. With a 2.5V reference, 1 LSB is equal to 610 µV. Although the
ADC is not production tested with a 2.5V reference, when V
A
+
and V
D
+
are +5.0V, linearity error typically will not
change more than 0.1 LSB (see the curves in the Typical Electrical Characteristics Section). With the ADC set to
an acquisition time of 10 clock periods, the input biasing resistor needs to be 600Ω or less. Notice though that
the input coupling capacitor needs to be made fairly large to bring down the high pass corner. Increasing the
acquisition time to 34 clock periods (with a 5 MHz CCLK frequency) would allow the 600Ω to increase to 6k,
which with a 1 µF coupling capacitor would set the high pass corner at 26 Hz. Increasing R, to 6k would allow R
2
to be 2k.
Figure 66. Pseudo-Differential Biasing with the Signal Source AC Coupled Directly into the ADC
An alternative method for biasing pseudo-differential operation is to use the +2.5V from the LM4040 to bias any
amplifier circuits driving the ADC as shown in Figure 67. The value of the resistor pull-up biasing the LM4040-2.5
will depend upon the current required by the op amp biasing circuitry.
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