Datasheet

ADC12030, ADC12032, ADC12034
ADC12038, ADC12H030, ADC12H032
ADC12H034, ADC12H038
www.ti.com SNAS080K –JULY 1999–REVISED MARCH 2013
Hardware power up/down is controlled by the state of the PD pin. Software power-up/down is controlled by the
instruction issued to the ADC. If a software power up instruction is issued to the ADC while a hardware power
down is in effect (PD pin high) the device will remain in the power-down state. If a software power down
instruction is issued to the ADC while a hardware power up is in effect (PD pin low), the device will power down.
When the device is powered down by software, it may be powered up by either issuing a software power up
instruction or by taking PD pin high and then low. If the power down command is issued during a conversion, that
conversion is interrupted, so the data output after power up cannot be relied upon.
Figure 62. Changing the ADC's Conversion Configuration
1.6 User Mode and Test Mode
An instruction may be issued to the ADC to put it into test mode, which is used by the manufacturer to verify
complete functionality of the device. During test mode CH0–CH7 become active outputs. If the device is
inadvertently put into the test mode with CS continuously low, the serial communications may be
desynchronized. Synchronization may be regained by cycling the power supply voltage to the device. Cycling the
power supply voltage will also set the device into user mode. If CS is used in the serial interface, the ADC may
be queried to see what mode it is in. This is done by issuing a “read STATUS register” instruction to the ADC.
When bit 9 of the status register is high, the ADC is in test mode; when bit 9 is low the ADC, is in user mode. As
an alternative to cycling the power supply, an instruction sequence may be used to return the device to user
mode. This instruction sequence must be issued to the ADC using CS. The following table lists the instructions
required to return the device to user mode. Note that this entire sequence, including both Test Mode and User
Mode values, should be sent to recover from the test mode.
DI Data
(1)
Instruction
DI0 DI1 DI2 DI3 DI4 DI5 DI6 D17
TEST MODE H X X X H H H H
Reset L L L L H H H L
Test Mode
L L L L H L H L
Instructions
L L L L H L H H
USER MODE L L L L H H H H
Power Up L L L L H L H L
Set DO with or without Sign H or L L L L H H L H
Set Acquisition Time H or L H or L L L H H H L
Start a Conversion H or L H or L H or L H or L L H or L H or L H or L
(1) X = Don't Care
The power up, data with or without sign, and acquisition time instructions should be resent after returning to the
user mode. This is to ensure that the ADC is in the required state before a conversion is started.
1.7 Reading the Data Without Starting a Conversion
The data from a particular conversion may be accessed without starting a new conversion by ensuring that the
CONV line is taken high during the I/O sequence. See Figure 49 and Figure 50. Table 6 describes the operation
of the CONV pin. It is not necessary to read the data as soon as DOR goes low. The data will remain in the
output register ifCS is brought high right after DOR goes high. A single conversion may be read as many times
as desired before CS is brought low.
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ADC12H038