Datasheet

ADC12030, ADC12032, ADC12034
ADC12038, ADC12H030, ADC12H032
ADC12H034, ADC12H038
SNAS080K –JULY 1999–REVISED MARCH 2013 www.ti.com
Format and Set-Up Tables
Table 1. Data Out Formats
(1)
DO Formats DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 DB16
17
X X X X Sign MSB 10 9 8 7 6 5 4 3 2 1 LSB
Bits
MSB 13
Sign MSB 10 9 8 7 6 5 4 3 2 1 LSB
First Bits
9
Sign MSB 6 5 4 3 2 1 LSB
Bits
with Sign
17
LSB 1 2 3 4 5 6 7 8 9 10 MSB Sign X X X X
Bits
LSB 13
LSB 1 2 3 4 5 6 7 8 9 10 MSB Sign
First Bits
9
LSB 1 2 3 4 5 6 MSB Sign
Bits
16
0 0 0 0 MSB 10 9 8 7 6 5 4 3 2 1 LSB
Bits
MSB 12
MSB 10 9 8 7 6 5 4 3 2 1 LSB
First Bits
8
MSB 6 5 4 3 2 1 LSB
Bits
without
sign
16
LSB 1 2 3 4 5 6 7 8 9 10 MSB 0 0 0
Bits
LSB 12
LSB 1 2 3 4 5 6 7 8 9 10 MSB
First Bits
8
LSB 1 2 3 4 5 6 MSB
Bits
(1) X = High or Low state.
Table 2. ADC12038 Multiplexer Addressing
Analog Channel Addressed
and Assignment ADC Input Polarity Multiplexer Output
MUX Address
with A/DIN1 tied to MUXOUT1 Assignment Channel Assignment
Mode
and A/DIN2 tied to MUXOUT2
DI0 DI1 DI2 DI3 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM A/DIN1 A/DIN2 MUXOUT1 MUXOUT2
L L L L + − + − CH0 CH1
L L L H + − + − CH2 CH3
L L H L + − + − CH4 CH5
L L H H + − + − CH6 CH7
Differential
L H L L − + − + CH0 CH1
L H L H − + − + CH2 CH3
L H H L − + − + CH4 CH5
L H H H − + − + CH6 CH7
H L L L + − + − CH0 COM
H L L H + − + − CH2 COM
H L H L + − + − CH4 COM
H L H H + − + − CH6 COM
Single-Ended
H H L L + − + − CH1 COM
H H L H + − + − CH3 COM
H H H L + − + − CH5 COM
H H H H + − + − CH7 COM
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ADC12H038