Datasheet

IN0
IN7
.
.
.
MICROPROCESSOR
DSP
SCLK
CS
DIN
DOUT
AGND
V
A
V
D
ADC108S052
LP2950
5V
0.1 PF
1.0 PF0.1 PF
1 PF0.1 PF
DGND
1.0 PF
51:
22:
INPUT
1 nF
ADC108S052
SNAS337G –SEPTEMBER 2005–REVISED MARCH 2013 www.ti.com
DIGITAL INPUTS AND OUTPUTS
The ADC108S052's digital inputs (SCLK, CS, and DIN) have an operating range of 0 V to V
A
. They are not prone
to latch-up and may be asserted before the digital supply (V
D
) without any risk. The digital output (DOUT)
operating range is controlled by V
D
. The output high voltage is V
D
- 0.5V (min) while the output low voltage is
0.4V (max).
Applications Information
TYPICAL APPLICATION CIRCUIT
A typical application is shown in Figure 37. The split analog and digital supply pins are both powered in this
example by the LP2950 low-dropout voltage regulator. The analog supply is bypassed with a capacitor network
located close to the ADC108S052. The digital supply is separated from the analog supply by an isolation resistor
and bypassed with additional capacitors. The ADC108S052 uses the analog supply (V
A
) as its reference voltage,
so it is very important that V
A
be kept as clean as possible. Due to the low power requirements of the
ADC108S052, it is also possible to use a precision reference as a power supply.
To minimize the error caused by the changing input capacitance of the ADC108S052, a capacitor is connected
from each input pin to ground. The capacitor, which is much larger than the input capacitance of the
ADC108S052 when in track mode, provides the current to quickly charge the sampling capacitor of the
ADC108S052. An isolation resistor is added to isolate the load capacitance from the input source.
Figure 37. Typical Application Circuit
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