Datasheet

30 pF

3 pF

Conversion Phase - Switch Open

Track Phase - Switch Closed

ADC104S021

www.ti.com

SNAS278H –FEBRUARY 2005–REVISED MARCH 2013

The capacitor C1 in Figure 50 has a typical value of 3 pF, and is mainly the package pin capacitance. Resistor

R1 is the on resistance of the multiplexer and track / hold switch, and is typically 500 ohms. Capacitor C2 is the

ADC104S021/ADC104S021Q sampling capacitor, and is typically 30 pF. The ADC104S021/ADC104S021Q will

deliver best performance when driven by a low-impedance source to eliminate distortion caused by the charging

of the sampling capacitance. This is especially important when using the ADC104S021/ADC104S021Q to

sample AC signals. Also important when sampling dynamic signals is a band-pass or low-pass filter to reduce

harmonics and noise, improving dynamic performance.

Figure 50. Equivalent Input Circuit

DIGITAL INPUTS AND OUTPUTS

The ADC104S021/ADC104S021Q's digital output DOUT is limited by, and cannot exceed, the supply voltage,

. The digital input pins are not prone to latch-up and, and although not recommended, SCLK, CS and DIN may

be asserted before V

without any latch-up risk.

POWER SUPPLY CONSIDERATIONS

The ADC104S021/ADC104S021Q is fully powered-up whenever CS is low, and fully powered-down whenever

CS is high, with one exception: the ADC104S021/ADC104S021Q automatically enters power-down mode

between the 16th falling edge of a conversion and the 1st falling edge of the subsequent conversion (see Timing

Diagrams).

The ADC104S021/ADC104S021Q can perform multiple conversions back to back; each conversion requires 16

SCLK cycles. The ADC104S021/ADC104S021Q will perform conversions continuously as long as CS is held low.

The user may trade off throughput for power consumption by simply performing fewer conversions per unit time.

Figure 45 in the Typical Performance Characteristics shows the typical power consumption of the

ADC104S021/ADC104S021Q versus throughput. To calculate the power consumption, simply multiply the

fraction of time spent in the normal mode by the normal mode power consumption, and add the fraction of time

spent in shutdown mode multiplied by the shutdown mode power dissipation.

Power Management

When the ADC104S021/ADC104S021Q is operated continuously in normal mode, the maximum throughput is

SCLK

/16. Throughput may be traded for power consumption by running f

SCLK

at its maximum 3.2 MHz and

performing fewer conversions per unit time, putting the ADC104S021/ADC104S021Q into shutdown mode

between conversions. Figure 45 is shown in the Typical Performance Characteristics. To calculate the power

consumption for a given throughput, multiply the fraction of time spent in the normal mode by the normal mode

power consumption and add the fraction of time spent in shutdown mode multiplied by the shutdown mode power

consumption. Generally, the user will put the part into normal mode and then put the part back into shutdown

mode. Note that the curve of Figure 45 is nearly linear. This is because the power consumption in the shutdown

mode is so small that it can be ignored for all practical purposes.

Product Folder Links: ADC104S021