Datasheet
Snap
Back
GND
D1
PIN
V+
2.1k
41.5k
41.5k
Snap
Back
GND
D1
PIN
ADC101C021, ADC101C027
SNAS446D –FEBRUARY 2008–REVISED FEBRUARY 2013
www.ti.com
PIN DESCRIPTIONS
Symbol Type Equivalent Circuit Description
Power and unbufferred reference voltage. V
A
must be free
V
A
Supply
of noise and decoupled to GND.
GND Ground Ground for all on-chip circuitry.
V
IN
Analog Input See Figure 19 Analog input. This signal can range from GND to V
A
.
Alert output. Can be configured as active high or active low.
ALERT Digital Output This is an open drain data line that must be pulled to the
supply (V
A
) with an external pull-up resistor.
Serial Clock Input. SCL is used together with SDA to control
the transfer of data in and out of the device. This is an open
drain data line that must be pulled to the supply (V
A
) with an
SCL Digital Input
external pull-up resistor. This pin's extended ESD tolerance(
8kV HBM) allows extension of the I
2
C bus across multiple
boards without extra ESD protection.
Serial Data bi-directional connection. Data is clocked into or
out of the internal 16-bit register with SCL. This is an open
Digital drain data line that must be pulled to the supply (V
A
) with an
SDA
Input/Output external pull-up resistor. This pin's extended ESD tolerance(
8kV HBM) allows extension of the I
2
C bus across multiple
boards without extra ESD protection.
Tri-level Address Selection Input. Sets Bits A0 & A1 of the
ADR0
7-bit slave address. (see Table 3)
Digital Input,
three levels
Tri-level Address Selection Input. Sets Bits A2 & A3 of the
ADR1
7-bit slave address. (see Table 3)
Table 2. Package Pinouts
V
A
GND V
IN
ALERT SCL SDA ADR0 ADR1
ADC101C021
1 2 3 4 5 6 N/A N/A
SOT-6
ADC101C027
1 2 3 N/A 5 6 4 N/A
SOT-6
ADC101C021
5 7 4 2 1 8 3 6
VSSOP-8
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Product Folder Links: ADC101C021 ADC101C027