Datasheet

TIME
VOLTAGE
V
HIGH
Limit
V
HIGH
- V
HYST
ALERT pin
(Active Low)
Measured Voltage
Over Range Alert
)ODJVHWWR³1´
ADC101C021, ADC101C027
www.ti.com SNAS446D –FEBRUARY 2008–REVISED FEBRUARY 2013
Figure 25. Alert condition cleared by writing a "1" to the Alert Flag.
AUTOMATIC CONVERSION MODE
The automatic conversion mode configures the ADC to continually perform conversions without receiving "read"
instructions from the controller over the I
2
C interface. The mode is activated by writing a non-zero value into the
Cycle Time bits - D[7:5] - of the Configuration register (see Configuration Register). Once the ADC101C021
enters this mode, the internal oscillator is always enabled. The ADC's control logic samples the input at the
sample rate set by the cycle time bits. Although the conversion result is not transmitted by the 2-wire interface, it
is stored in the conversion result register and updates the various status registers of the device.
In automatic conversion mode, the out-of-range alert function is active and updates after every conversion. The
ADC can operate independently of the controller in automatic conversion mode. When the input signal goes "out-
of-range", an alert signal is sent to the controller. The controller can then read the status registers and determine
the source of the alert condition. Also, comparison and updating of the V
MIN
and V
MAX
registers occur after every
conversion in automatic conversion mode. The controller can occasionally read the V
MIN
and/or V
MAX
registers to
determine the sampled input extremes. These register values persist until the user resets the V
MIN
and V
MAX
registers. These two features are useful in system monitoring, peak detection, and sensing applications.
COMMUNICATING WITH THE ADC101C021
The ADC101C021's data registers are selected by the address pointer (see Address Pointer Register). To
read/write a specific data register, the pointer must be set to that register's address. The pointer is always written
at the beginning of a write operation. When the pointer needs to be updated for a read cycle, a write operation
must precede the read operation to set the pointer address correctly. On the other hand, if the pointer is preset
correctly, a read operation can occur without writing the address pointer register. The following timing diagrams
describe the various read and write operations supported by the ADC.
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Product Folder Links: ADC101C021 ADC101C027