Datasheet

ADC101C021, ADC101C027
www.ti.com SNAS446D –FEBRUARY 2008–REVISED FEBRUARY 2013
V
LOW
-- Alert Limit Register - Under Range
This register holds the lower limit threshold used to determine the alert condition. If the conversion moves lower
than this limit, a V
LOW
alert is generated.
Pointer Address 03h (Read/Write)
Default Value: 0000h
D15 D14 D13 D12 D11 D10 D9 D8
Reserved V
LOW
Limit [9:6]
D7 D6 D5 D4 D3 D2 D1 D0
V
LOW
Limit [5:0] Reserved
Bits Name Description
15:12 Reserved Always reads zeros. Zeros must be written to these bits.
11:2 V
LOW
Limit Sets the lower limit threshold used to determine the alert condition. If the conversion moves lower than
this limit, a V
LOW
alert is generated.
1:0 Reserved Always reads zeros. Zeros must be written to these bits.
V
HIGH
-- Alert Limit Register - Over Range
This register holds the upper limit threshold used to determine the alert condition. If the conversion moves higher
than this limit, a V
HIGH
alert is generated.
Pointer Address 04h (Read/Write)
Default Value: 0FFFh
D15 D14 D13 D12 D11 D10 D9 D8
Reserved V
HIGH
Limit [9:6]
D7 D6 D5 D4 D3 D2 D1 D0
V
HIGH
Limit [5:0] Reserved
Bits Name Description
15:12 Reserved Always reads zeros. Zeros must be written to these bits.
11:2 V
HIGH
Limit Sets the upper limit threshold used to determine the alert condition. If the conversion moves higher
than this limit, a V
HIGH
alert is generated.
1:0 Reserved Always reads zeros. Zeros must be written to these bits.
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