ADC10154,ADC10158 ADC10154/ADC10158 10-Bit Plus Sign 4 µs ADCs with 4- or 8-Channel MUX, Track/Hold and Reference Literature Number: SNAS077A
ADC10154/ADC10158 10-Bit Plus Sign 4 µs ADCs with 4- or 8-Channel MUX, Track/Hold and Reference General Description Features The ADC10154 and ADC10158 are CMOS 10-bit plus sign successive approximation A/D converters with versatile analog input multiplexers, track/hold function and a 2.5V band-gap reference. The 4-channel or 8-channel multiplexers can be software configured for single-ended, differential or pseudo-differential modes of operation.
ADC10154/ADC10158 Connection Diagrams Dual-in-Line and SO Packages Dual-in-Line and SO Packages DS011225-2 DS011225-3 Top View Order Number ADC10154 NS Package Number M24B Top View Order Number ADC10158 NS Package Numbers M28B or N28B Pin Descriptions AV+ This is the positive analog supply. This pin should be bypassed with a 0.1 µF ceramic capacitor and a 10 µF tantalum capacitor to the system analog ground. DV+ This is the positive digital supply. This supply pin also needs to be bypassed with 0.
Storage Temperature Ceramic DIP Packages Plastic DIP and SO Packages If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
ADC10154/ADC10158 Electrical Characteristics (Continued) The following specifications apply for V+ = AV+ = DV+ = + 5.0 VDC, VREF+ = 5.000 VDC, VREF− = GND, V− = GND for unipolar operation or V− = −5.0 VDC for bipolar operation, and fCLK = 5.0 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
(Continued) The following specifications apply for V+ = AV+ = DV+ = + 5.0 VDC, VREF+ = 5.000 VDC, VREF− = GND, V− = GND for unipolar operation or V− = −5.0 VDC for bipolar operation, and fCLK = 5.0 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C. (Notes 8, 9, 12) Symbol Parameter Conditions Typical (Note 10) Limits (Note 11) Units (Limit) DYNAMIC CONVERTER AND MULTIPLEXER CHARACTERISTICS −3 dB Unipolar Full VIN = 4.
ADC10154/ADC10158 Electrical Characteristics The following specifications apply for V+ = AV+ = DV+ = + 5.0 VDC, VREF+ = 5.000 VDC, VREF− = GND, V− = GND for unipolar operation or V− = −5.0 VDC for bipolar operation, and fCLK = 5.0 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C. (Note 16) Symbol Parameter Conditions Typical (Note 10) Limits (Note 11) Units (Limit) 5.
(Continued) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
ADC10154/ADC10158 Electrical Characteristics (Continued) DS011225-6 FIGURE 1. Transfer Characteristic DS011225-7 FIGURE 2. Simplified Error Curve vs Output Code Ordering Information Industrial −40˚C ≤ TA ≤ 85˚C ADC10154CIWM www.national.
ADC10154/ADC10158 Typical Converter Performance Characteristics Total Positive Supply Current (DI+ + AI+) vs Temperature Total Positive Power Supply Current (DI+ + AI+) vs Clock Frequency Offset Error vs Temperature DS011225-29 DS011225-27 DS011225-28 Offset Error vs Reference Voltage Linearity Error vs Temperature Linearity Error vs Reference Voltage DS011225-30 Linearity Error vs Clock Frequency DS011225-31 Spectral Response with 50 kHz Sine Wave DS011225-32 10-Bit Unsigned Signal-to-Noise +
ADC10154/ADC10158 Typical Reference Performance Characteristics Load Regulation Line Regulation (3 Typical Parts) Output Drift vs Temperature (3 Typical Parts) DS011225-36 DS011225-37 DS011225-38 Available Output Current vs Supply Voltage DS011225-39 Leakage Current Test Circuit DS011225-10 www.national.
ADC10154/ADC10158 TRI-STATE Test Circuits and Waveforms DS011225-12 DS011225-11 DS011225-14 DS011225-13 Timing Diagrams DS011225-15 DIAGRAM 1. Starting a Conversion with New MUX Channel and Output Configuration 11 www.national.
ADC10154/ADC10158 Timing Diagrams (Continued) DS011225-16 DIAGRAM 2. Starting a Conversion without Changing the MUX Channel or Output Configuration DS011225-17 DIAGRAM 3. Reading the Conversion Result www.national.
TABLE 1.
ADC10154/ADC10158 Multiplexer Addressing and Output Data Configuration Tables (Continued) TABLE 3. ADC10154 Multiplexer Addressing MUX Address CS WR RD Channel Number MA4 MA3 MA2 MA1 MA0 X X L L L L X X L L H L X X L H L L H + − X X L H H L H − + X L H L L L H X L H L H L X L H H L L H X L H H H L H X H H L L L X H H L H L X H H H L L X X X X X L www.national.
DS011225-18 15 www.national.
ADC10154/ADC10158 1.0 Functional Description The ADC10154 and ADC10158 use successive approximation to digitize an analog input voltage. Additional logic has been incorporated in the devices to allow for the programmability of the resolution, conversion time and digital output format. A capacitive array and a resistive ladder structure are used in the DAC portion of the A/D converters. The structure of the DAC allows a very simple switching scheme to provide a very versatile analog input multiplexer.
of the digital output. This information is then manipulated by the Digital Output decoder to the programmed format. The reformatted data is then available to be strobed onto the data bus (DB0–DB7) via the digital output buffers by taking CS and RD low. (Continued) Digital Interface Hints: • Reads and writes can be completely asynchronous to CLK.
ADC10154/ADC10158 2.0 Applications Information (Continued) 2 Differential 4 Single-Ended DS011225-41 DS011225-40 3 Pseudo-Differential 2 Single Ended and 1 Differential DS011225-42 DS011225-43 FIGURE 4. Analog Input Multiplexer Options 2.2 REFERENCE CONSIDERATIONS The voltage difference between the VREF+ and VREF− inputs defines the analog input voltage span (the difference between VIN(Max) and VIN(Min)) over which the 2n (where n is the programmed resolution) possible output codes apply.
ADC10154/ADC10158 2.0 Applications Information (Continued) DS011225-21 a. Ratiometric Using the Internal Reference DS011225-22 b. Absolute Using a 4.096V Span FIGURE 5. Different Reference Configurations The minimum value of VREF (VREF = VREF+ − VREF−) can be quite small (see Typical Performance Characteristics) to allow direct conversion of transducer outputs providing less than a 5V output span.
ADC10154/ADC10158 2.0 Applications Information An acquisition window of 6 clock cycles is available to allow the voltage on the capacitor array to settle to the positive analog input voltage. Any change in the analog voltage on a selected positive input before or after the acquisition window will not effect the A/D conversion result.
specifications, while the hold settling time is included in the A/D’s maximum conversion time specification. The hold droop rate can be thought of as being zero since an unlimited amount of time can pass between a conversion and the reading of data. The data is lost after a new conversion has been completed. (Continued) The sample-and-hold error specifications are included in the error and timing specifications of the A/D.
ADC10154/ADC10158 Physical Dimensions inches (millimeters) unless otherwise noted Dual-In-Line Package (M) Order Number ADC10154CIWM NS Package Number M24B Dual-In-Line Package (M) Order Number ADC10158CIWM NS Package Number M28B www.national.
inches (millimeters) unless otherwise noted (Continued) Dual-In-Line Package (N) Order Number ADC10158BIN or ADC10158CIN NS Package Number N28B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1.
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