Datasheet

ADC10065
www.ti.com SNAS225H –JULY 2003–REVISED APRIL 2013
Pin Descriptions and Equivalent Circuits
Pin No. Pin Name Equivalent Circuit Description
ANALOG I/O
Inverting analog input signal. With a 1.2V reference the full-scale
12 V
IN
−
input signal level is a differential 1.0 V
P-P
. This pin may be tied to
V
COM
(pin 4) for single-ended operation.
Non-inverting analog input signal. With a 1.2V reference the full-
13 V
IN
+
scale input signal level is a differential 1.0 V
P-P
.
Reference input. This pin should be bypassed to V
SSA
with a 0.1 µF
6 V
REF
monolithic capacitor. V
REF
is 1.20V nominal. This pin may be driven
by a 1.20V external reference if desired. Do not load this pin.
7 V
REFT
4 V
COM
These pins are high impedance reference bypass pins only.
Connect a 0.1 µF capacitor from each of these pins to V
SSA
. These
pins should not be loaded. V
COM
may be used to set the input
8 V
REFB
common mode voltage, V
CM
.
DIGITAL I/O
Digital clock input. The range of frequencies for this input is 20 MHz
1 CLK
to 65 MHz. The input is sampled on the rising edge of this input.
DF = “1” Two’s Complement
15 DF
DF = “0” Offset Binary
This is the standby pin. When high, this pin sets the converter into
28 STBY
standby mode. When this pin is low, the converter is in active mode.
IRS = “V
DDA
” 2.0 V
P-P
differential input range
IRS = “V
SSA
” 1.5 V
P-P
differential input range
IRS (Input Range
5 IRS = “Floating” 1.0 V
P-P
differential input range
Select)
If using both V
IN
+ and V
IN
- pins, (or differential mode), then the
peak-to-peak voltage refers to the differential voltage (V
IN
+ - V
IN
-).
Copyright © 2003–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: ADC10065