Datasheet
ADC10061, ADC10062, ADC10064
SNAS069E –JUNE 1999–REVISED MARCH 2013
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AC Electrical Characteristics (continued)
The following specifications apply for V
+
= +5V, t
r
= t
f
= 20 ns, V
REF(+)
= 5V, V
REF(−)
= GND, and Speed Adjust pin unconnected
unless otherwise specified. Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= +25°C.
Units
Symbol Parameter Conditions Typical
(1)
Limit
(2)
(Limit)
R
SA
= ∞ 850 1400 ns (max)
t
CRD
Mode 2 Conversion Time
Mode 2, R
SA
= 18k 530 ns
Access Time (Delay from Falling Edge of
t
ACC1
Mode 1; C
L
= 100 pF 30 60 ns (max)
RD to Output Valid)
Access Time (Delay from Falling Edge of
t
ACC2
Mode 2; C
L
= 100 pF 900 t
CRD
+ 50 ns (max)
RD to Output Valid)
t
SH
Minimum Sample Time
(3)
Figure 4
(2)
250 ns (max)
TRI-STATE Control (Delay from Rising
t
1H
, t
0H
R
L
= 1k, C
L
= 10 pF 30 60 ns (max)
Edge of RD to High-Z State)
Delay from Rising Edge of RD to Rising
t
INTH
C
L
= 100 pF 25 50 ns (max)
Edge of INT
Delay from End of Conversion to Next
t
P
50 ns (max)
Conversion
t
MS
Multiplexer Control Setup Time 10 75 ns (max)
t
MH
Multiplexer Hold Time 10 40 ns (max)
C
VIN
Analog Input Capacitance 35 pF (max)
C
OUT
Logic Output Capacitance 5 pF (max)
C
IN
Logic Input Capacitance 5 pF (max)
(3) Accuracy may degrade if t
SH
is shorter than the value specified. See curves of Accuracy vs. t
SH
.
TRI-STATE Test Circuits and Waveforms
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