Datasheet

ADC10061, ADC10062, ADC10064
www.ti.com SNAS069E –JUNE 1999–REVISED MARCH 2013
NOTE: The ADC10061 and ADC10062 are obsolete; shown for reference only.
PIN DESCRIPTIONS
Pin Function Description
DV
CC
, AV
CC
Digital and analog positive supply voltage inputs. Connect both to the same voltage source, but bypass separately with
a 0.1 µF ceramic capacitor in parallel with a 10 µF tantalum capacitor to ground at each pin.
INT Active low interrupt output. INT goes low at the end of each conversion, and returns high following the rising edge of
RD.
S/H Sample/Hold control input. When this pin is forced low (and CS is low), the analog input signal is sampled and a new
conversion is initiated.
RD Active low read control input. When this RD and CS are low, any data present in the output registers will be placed
onto the data bus.
CS Active low Chip Select control input. When low, this pin enables the RD and S/H pins.
S0, S1 On the multiple-input devices (ADC10062 and ADC10064), these pins select the analog input that will be connected to
the A/D during the conversion. The input is selected based on the state of S0 and S1 when S/H makes its High-to-Low
transition (See Timing Diagrams). The ADC10064 includes both S0 and S1. The ADC10062 includes just S0, and the
ADC10061 has neither.
V
REF−
, V
REF+
Reference voltage inputs. They may be placed at any voltage between GND and V
CC
, but V
REF+
must be greater than
V
REF−
. An input voltage equal to V
REF−
produces an output code of 0, and an input voltage equal to (V
REF+
− 1 LSB)
produces an output code of 1023.
V
IN
, V
IN0
, V
IN1
, Analog input pins. The ADC10061 has one input (V
IN
), the ADC10062 has two inputs (V
IN0
and V
IN1
), and the
V
IN2
, V
IN3
ADC10064 has four inputs (V
IN0
, V
IN1
, V
IN2
and V
IN3
). The impedance of the input source should be less than 500Ω for
best accuracy and conversion speed. For accurate conversions, no input pin (even one that is not selected) should be
driven more than 50 mV above V
CC
or 50 mV below ground.
GND, AGND, Power supply ground pins. The ADC10061 has a single ground pin (GND), and the ADC10062 and ADC10064 have
DGND separate analog and digital ground pins (AGND and DGND) for separate bypassing of the analog and digital supplies.
The ground pins should be connected to a stable, noise-free system ground. For the devices with two ground pins,
both pins should be returned to the same potential.
DB0–DB9 TRI-STATE data output pins.
SPEED ADJ (ADC10062 and ADC10064 only). This pin is normally left unconnected, but by connecting a resistor between this pin
and ground, the conversion time can be reduced. See Typical Performance Characteristics and the table of Electrical
Characteristics.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Product Folder Links: ADC10061 ADC10062 ADC10064