Datasheet

ADC10061, ADC10062, ADC10064

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SNAS069E –JUNE 1999–REVISED MARCH 2013

where

• S/(N + D) is the ratio of signal to noise and distortion, which can vary with frequency (1)

As an example, an ADC10061 with a 5 V

P-P

, 100 kHz sine wave input signal will typically have a signal-to-noise-

plus-distortion ratio of 59.2 dB, which is equivalent to 9.54 effective bits. As the input frequency increases, noise

and distortion gradually increase, yielding a plot of effective bits or S/(N + D) as shown in Typical Performance

Characteristics.

SPEED ADJUST

In applications that require faster conversion times, the Speed Adjust pin (pin 14 on the ADC10062, pin 17 on the

ADC10064) can significantly reduce the conversion time. The speed adjust pin is connected to an on-chip current

source that determines the converter's internal timing. By connecting a resistor between the speed adjust pin and

ground as shown in Figure 21, the internal programming current is increased, which reduces the conversion time.

As an example, an 18k resistor reduces the conversion time of a typical part from 600 ns to 350 ns with no

significant effect on linearity. Using smaller resistors to further decrease the conversion time is possible as well,

although the linearity will begin to degrade somewhat (see Typical Performance Characteristics). Note that the

resistor value needed to obtain a given conversion time will vary from part to part, so this technique will generally

require some “tweaking” to obtain satisfactory results.

Product Folder Links: ADC10061 ADC10062 ADC10064