Datasheet

8 11
AGND
ADC08L060
D7
13
D6
14
D5
15
D0
22
D1
21
D2
20
D3
19
D4
16
6
4.7k
3
0.1 PF
309:
+3V
470:
5
17
DR GND
10
V
RT
V
IN
1/2 LM8272
-
+
1
8
4
3
2
10 PF
+
+3V
0.01 PF
1 PF
1/2 LM8272
+
-
6
5
1.62k
0.01 PF
7
604:
LM4040-2.5
2
0.1 PF
10 PF
+
+
124 18
0.1 PF
10 PF
DR V
D
V
A
Choke
1
V
RB
24
CLK
0.1 PF
9
23
PD
0.1 PF
7
V
IN
GND
1 PF
4.7k
1 PF
ADC08L060
SNAS167G –MAY 2002–REVISED MARCH 2013 www.ti.com
The reference bias circuit of Figure 30 is very simple and the performance is adequate for many applications.
However, circuit tolerances will lead to a wide reference voltage range. Better reference stability can be achieved
by driving the reference pins with low impedance sources.
The circuit of Figure 31 will allow a more accurate setting of the reference voltages. The upper amplifier must be
able to source the reference current as determined by the value of the reference resistor and the value of (V
RT
-
V
RB
). The lower amplifier must be able to sink this reference current. Both should be stable with a capacitive
load. The LM8272 was chosen because of its rail-to-rail input and output capability, its high current output and its
ability to drive large capacitance loads. Of course, the divider resistors at the amplifier input could be changed to
suit your reference voltage needs, or the divider can be replaced with potentiometers for precise settings. The
bottom of the ladder (V
RB
) may simply be returned to ground if the minimum input signal excursion is 0V. Be sure
that the driving source can source sufficient current into the V
RT
pin and sink enough current from the V
RB
pin to
keep these pins stable.
V
RT
should always be more positive than V
RB
by the minimum V
RT
- V
RB
difference in the Electrical
Characteristics table to minimize noise. Furthermore, the difference between V
RT
and V
RB
should not exceed the
maximum value specified in the Electrical Characteristics table to avoid signal distortion.
The V
RM
pin is the center of the reference ladder and should be bypassed to a quiet point in the analog ground
plane with a 0.1 µF capacitor. DO NOT allow this pin to float.
A. Driving the reference to force desired values requires driving with a low impedance source.
Figure 31. Setting of Reference Voltages
THE ANALOG INPUT
The analog input of the ADC08L060 is a switch followed by an integrator. The input capacitance changes with
the clock level, appearing as 3 pF when the clock is low, and 4 pF when the clock is high. The sampling nature
of the analog input causes current spikes that result in voltage spikes at the analog input pin. Any circuit used to
drive the analog input must be able to drive that input and to settle within the clock low time. The LMH6702 has
been found to be a good amplifier to drive the ADC08L060.
Figure 32 shows an example of an input circuit using the LMH6702. Any input amplifier should incorporate some
gain as operational amplifiers exhibit better phase margin and transient response with gains above 2 or 3 than
with unity gain. If an overall gain of less than 3 is required, attenuate the input and operate the amplifier at a
higher gain, as shown in Figure 32.
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