Datasheet

t
CSH
SCLK
CS
t
CSS
CS
t
CONVERT
t
ACQ
t
CH
t
CL
t
EN
t
DH
t
DS
FOUR ZEROS
DB6
DONTC DONTC ADD2 ADD1 ADD0
DONTC
DONTC DONTC
DB7
DB5 DB4
B1
12
87654321
DB0
DIN
DOUT
SCLK
CS
t
DIS
13 14
t
DACC
t
DHLD
FOUR ZEROS
15 16
8 9 10 11 12 13 14 15 16
Track
Hold
Power Up
ADD2 ADD1 ADD0
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DIN
DOUT
SCLK
CS
Control register
1 2 3 4 5 6 7
1 2 3 4 5 6 7
ADD2 ADD1 ADD0
8
DB7 DB6 DB5
Power
Down
Power Up
Track
Hold
ADC088S022
SNAS341F –SEPTEMBER 2005–REVISED MARCH 2013 www.ti.com
Timing Diagrams
Figure 1. ADC088S022 Operational Timing Diagram
Figure 2. ADC088S022 Serial Timing Diagram
Figure 3. SCLK and CS Timing Parameters
Specification Definitions
ACQUISITION TIME is the time required for the ADC to acquire the input voltage. During this time, the hold
capacitor is charged by the input voltage.
APERTURE DELAY is the time between the fourth falling edge of SCLK and the time when the input signal is
internally acquired or held for conversion.
CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input
voltage to a digital word.
CHANNEL-TO-CHANNEL ISOLATION is resistance to coupling of energy from one channel into another
channel.
CROSSTALK is the coupling of energy from one channel into another channel. This is similar to Channel-to-
Channel Isolation, except for the sign of the data.
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