Datasheet

ADC08831, ADC08832
www.ti.com
SNAS015C SEPTEMBER 1999REVISED MARCH 2013
Electrical Characteristics
The following specifications apply for V
CC
= V
REF
= +5V
DC
, and f
CLK
= 2 MHz unless otherwise specified. Boldface limits
apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25°C.
Symbol Parameter Conditions Typical
(1)
Limits
(2)
Units (Limits)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
TUE Total Unadjusted Error See
(3)
±0.3 ±1 LSB
(max)
Offset Error ±0.2 LSB
DNL Differential NonLinearity ±0.2 LSB
INL Integral NonLinearity ±0.2 LSB
FS Full Scale Error ±0.3 LSB
R
REF
Reference Input Resistance See
(4)
3.5 2.8 kΩ (min)
5.9 kΩ (max)
V
IN
Analog Input Voltage See
(5)
(V
CC
+ 0.05) V (max)
(GND 0.05) V (min)
DC Common-Mode Error ±¼ LSB (max)
Power Supply Sensitivity V
CC
= 5V ±10%, ±¼ LSB (max)
V
CC
= 5V ±5% ±¼ LSB (max)
On Channel Leakage Current
(6)
On Channel = 5V, 0.2 μA (max)
Off Channel = 0V 1
On Channel = 0V 0.2 μA (min)
Off Channel = 5V 1
Off Channel Leakage Current
(7)
On Channel = 5V, Off 0.2 μA (min)
Channel = 0V 1
On Channel = 0V, 0.2 μA (max)
Off Channel = 5V 1
DC CHARACTERISTICS
V
IN(1)
Logical “1” Input Voltage 2.0 V (min)
V
IN(0)
Logical “0” Input Voltage 0.8 V (max)
I
IN(1)
Logical “1” Input Current V
IN
= 5.0V 0.05 +1 μA (max)
I
IN(0)
Logical “0” Input Current V
IN
= 0V 0.05 1 μA (max)
V
OUT(1)
Logical “1” Output Voltage V
CC
= 4.75V:
I
OUT
= 360 μA 2.4 V (min)
I
OUT
= 10 μA 4.5 V (min)
V
OUT(0)
Logical “0” Output Voltage V
CC
= 4.75V 0.4 V (max)
I
OUT
= 1.6 mA
(1) Typicals are at T
J
= 25°C and represent the most likely parametric norm.
(2) Specified to TI's AOQL (Average Outgoing Quality Level).
(3) Total Unadjusted Error (TUE) includes offset, full-scale, linearity, multiplexer errors.
(4) It is not tested for the ADC08832.
(5) For V
IN()
V
IN(+)
the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see ADC08832 Functional Block
Diagram) which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than V
CC
supply.
During testing at low V
CC
levels (e.g., 4.5V), high level analog inputs (e.g., 5V) can cause an input diode to conduct, especially at
elevated temperatures, which will cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of either diode; this
means that as long as the analog V
IN
does not exceed the supply voltage by more than 50 mV, the output code will be correct.
Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
DC
to 5
V
DC
input voltage range will therefore require a minimum supply voltage of 4.950 V
DC
over temperature variations, initial tolerance and
loading.
(6) Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage
current the following two cases are considered: one, with the selected channel tied high (5 V
DC
) and the remaining off channel tied low
(0 V
DC
), total current flow through the off channel is measured; two, with the selected channel tied low and the off channels tied high,
total current flow through the off channel is again measured. The two cases considered for determining on channel leakage current are
the same except total current flow through the selected channel is measured.
(7) Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage
current the following two cases are considered: one, with the selected channel tied high (5 V
DC
) and the remaining off channel tied low
(0 V
DC
), total current flow through the off channel is measured; two, with the selected channel tied low and the off channels tied high,
total current flow through the off channel is again measured. The two cases considered for determining on channel leakage current are
the same except total current flow through the selected channel is measured.
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