Datasheet

IN1
MUX
AGND
SAMPLING
CAPACITOR
SW1
-
+
CONTROL
LOGIC
CHARGE
REDISTRIBUTION
DAC
SW2
IN4
2
V
A
IN1
MUX
AGND
SAMPLING
CAPACITOR
SW1
-
+
CONTROL
LOGIC
CHARGE
REDISTRIBUTION
DAC
SW2
IN4
2
V
A
ADC084S021
SNAS279E –APRIL 2005–REVISED MARCH 2013 www.ti.com
APPLICATIONS INFORMATION
ADC084S021 OPERATION
The ADC084S021 is a successive-approximation analog-to-digital converter designed around a charge-
redistribution digital-to-analog converter. Simplified schematics of the ADC084S021 in both track and hold modes
are shown in Figure 46 and Figure 47, respectively. Figure 46 shows the ADC084S021 in track mode: switch
SW1 connects the sampling capacitor to one of four analog input channels through the multiplexer, and SW2
balances the comparator inputs. The ADC084S021 is in this state for the first three SCLK cycles after CS is
brought low.
Figure 47 shows the ADC084S021 in hold mode: switch SW1 connects the sampling capacitor to ground,
maintaining the sampled voltage, and switch SW2 unbalances the comparator. The control logic then instructs
the charge-redistribution DAC to add fixed amounts of charge to the sampling capacitor until the comparator is
balanced. When the comparator is balanced, the digital word supplied to the DAC is the digital representation of
the analog input voltage. The ADC084S021 is in this state for the fourth through sixteenth SCLK cycles after CS
is brought low.
The time when CS is low is considered a serial frame. Each of these frames should contain an integer multiple of
16 SCLK cycles, during which time a conversion is performed and clocked out at the DOUT pin and data is
clocked into the DIN pin to indicate the multiplexer address for the next conversion.
Figure 46. ADC084S021 in Track Mode
Figure 47. ADC084S021 in Hold Mode
USING THE ADC084S021
Figure 2 and Figure 4 for the ADC084S021 are shown in Timing Diagrams. CS is chip select, which initiates
conversions and frames the serial data transfers. SCLK (serial clock) controls both the conversion process and
the timing of serial data. DOUT is the serial data output pin, where a conversion result is sent as a serial data
stream, MSB first. Data at DIN, the serial data input pin, is written to the ADC084S021's Control Register. New
data is written to DIN with each conversion.
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