Datasheet

®
ACF2101
12
For C
INTEGRATION
= 100pF, R
PROGRAM
is calculated below:
At the end of the integration cycle, the Hold switch of the
ACF2101 is opened to hold a constant value at the output of
the ACF2101. The constant value output voltage of the
ACF2101 is transferred onto a 10nF capacitor by closing the
ACF2101’s Select switch. The Select switch is then opened
which holds the voltage on the 10nF capacitor during the
next integration cycle and creates a DC output. With this
operation, the Select switch of the ACF2101 and the 10nF
capacitor form a Sample/Hold (S/H) circuit. The OPA2107
is used to buffer the Sample/Hold output. The charge injec-
tion of the Select switch creates a small offset voltage, of
approximately 1mV in this example. The 10nF capacitor
was chosen as a large value to minimize this offset voltage.
After the Select switch opens, the ACF2101 is reset by
momentarily closing the Reset switch. The ACF2101’s Hold
switch is then closed to begin another integration cycle.
During the period of time that the Hold switch is open, the
input signal current is stored on the input capacitance of the
sensor (C
IN
). During this time, the input signal current
creates a voltage across the sensor. This voltage should be
kept below 500mV. When the Hold switch is closed, the
charge that has collected on C
IN
will be transferred to the
integration capacitor, C
INTEGRATION
, with no loss of signal.
Therefore, one integration cycle ends and the next integra-
tion cycle begins when the Hold switch is opened.
If 100% of signal acquisition is not required, or not wanted,
the Hold switch may be left closed, or the direct input to the
ACF2101 used. In this mode of operation, an integration
cycle ends when the Select switch is opened and the next
integration cycle begins when the Reset switch is opened.
Figure 11 shows a simple digital pattern generator which can
be used to create the timing signals to control the ACF2101
circuit of Figure 10. This circuit creates signals to control
the Select, Reset and Hold switches at a rate controlled by
the frequency of f
S
. Figure 9 shows the timing diagram
for these circuits.
In a sampled data system, the output of the ACF2101 at the
output of the Select switch can be converted to digital when
the ACF2101 is in the Hold mode. In this situation, of
course, the 10nF capacitor and the OPA2107 op amp are not
required.
f
S
R
PROGRAM
10kHz 1MΩ
1kHz 10MΩ
100Hz 100MΩ
60Hz 167MΩ
50Hz 200MΩ
10Hz 1GΩ
FIGURE 10. Programmable Current-to-Voltage Converter.
SENSOR
Hold
Reset
100pF
1/2
ACF2101
Select
V
I
C
10nF
IN
OUT
1/2
OPA2107
FIGURE 9. ACF2101 Current-to-Voltage Converter
Timing Diagram.
OUT
f
Integrator
output
V
See
Close-up
below
S
Hold
R
eset
Select
Reset
Integrator
output
Current-to-Voltage converter timing diagram overview.
Expanded view of ACF2101 timin
g
si
g
nals.
Hold
Hold
f
S
Transfer of
charge
from C
IN
Start/End
of integration cycle