Datasheet

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FEATURES
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1A
1Y
2Y
GND
GND
3Y
4Y
4B
1B
2A
2B
V
CC
V
CC
3A
3B
4A
D OR N PACKAGE
(TOP VIEW)
DESCRIPTION
1
1A
16
1B
1Y
2
15
2A
14
2B
2Y
3
11
3A
10
3B
3Y
6
9
4A
8
4B
4Y
7
&
74AC11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
SCLS054B APRIL 1987 REVISED JUNE 2005
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC™ (Enhanced-Performance Implanted
CMOS) 1- µ m Process
500-mA Typ Latch-Up Immunity at 125 ° C
Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic 300-mil DIPs (N)
This device contains four independent 2-input NAND gates. It performs the Boolean function Y = A B or
Y = A + B in positive logic.
The 74AC11000 is characterized for operation from –40 ° C to 85 ° C.
FUNCTION TABLE
(EACH GATE)
INPUTS OUTPUT
Y
A B
H H L
L X H
X L H
LOGIC SYMBOL
(1)
(1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1987–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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