User Guide

WE866C6 Hardware Design Guide
1VV0301658 Rev. 1 Page 16 of 58 2020-06-16
LGA Pads Layout
A
B
C
D
E
F
G
1
VDD_3.3V
GND
GND
ANT1
GND
GND
RFU
2
VDD_3.3V
GND
GND
GND
GND
GND
GND
3
VDDIO
BT_CTS
(I)
LTE_UART_RX
(I)
RFU
RFU
GND
RFU (ANT2)
4
BT_TXD
(O)
BT_RTS
(O)
LTE_UART_TX
(O)
WOW
(OD)
RFU
GND
GND
5
BT_RXD
(I)
LF_CLK_IN
(I)
BT_I2S_WS
(I)
BT_I2S_SCK
(I)
RFU
RFU
WL_EN
(I)
6
SDIO_D2
SDIO_D1
BT_I2S_SDI
(I)
BT_I2S_SDO
(O)
RFU
RFU
BT_EN
(I)
7
GND
SDIO_D3
SDIO_D0
SDIO_CLK
(I)
SDIO_CMD
RFU
GND
TOP VIEW
WARNING
Reserved pins must not be connected.