PSM Application Note r2
Table Of Contents
- Notice
- Copyrights
- Computer Software Copyrights
- Usage and Disclosure Restrictions
- APPLICABILITY TABLE
- CONTENTS
- 1. Introduction
- 2. OVERVIEW
- 3. PSM DESCRIPTION
- 4. PINS ALLOCATION
- 5. Glossary and Acronyms
- 6. Document History
80471NT11483A Rev. 2 Page 18 of 24 2017-06-06
In systems that cannot ensure that no voltage will be applied to the LE866 IOs during PSM
status, the VDDIO_IN line should be kept supplied.
The LE866 lowest power consumption can be achieved powering the VDDIO_IN externally
(allowing all other LE866 power supplies to be disabled).
This could be done using for example an LDO with a low quiescent current (i.e. TOREX
XC6504A181NR-G)
Another alternative is to add logic such as a buffer on the required signals, using the
PSM_STATUS line as the output enable control Low=PSM, High=Not PSM.